1/* 2 *(C) Copyright 2005-2007 Netstal Maschinen AG 3 * Niklaus Giger (Niklaus.Giger@netstal.com) 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24/************************************************************************ 25 * mcu25.h - configuration for MCU25 board (similar to hcu4.h) 26 ***********************************************************************/ 27 28#ifndef __CONFIG_H 29#define __CONFIG_H 30 31/*----------------------------------------------------------------------- 32 * High Level Configuration Options 33 *----------------------------------------------------------------------*/ 34#define CONFIG_MCU25 1 /* Board is MCU25 */ 35#define CONFIG_4xx 1 /* ... PPC4xx family */ 36#define CONFIG_405GP 1 37#define CONFIG_4xx 1 38#define CONFIG_HOSTNAME mcu25 39 40/* 41 * Include common defines/options for all boards produced by Netstal Maschinen 42 */ 43#include "netstal-common.h" 44 45#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ 46 47#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ 48#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ 49 50/*----------------------------------------------------------------------- 51 * Base addresses -- Note these are effective addresses where the 52 * actual resources get mapped (not physical addresses) 53*----------------------------------------------------------------------*/ 54#define CONFIG_SYS_MONITOR_LEN (320 * 1024) /* Reserve 320 kB for Monitor */ 55#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ 56 57 58#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ 59#define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */ 60#define CONFIG_SYS_MONITOR_BASE TEXT_BASE 61 62/* ... with on-chip memory here (4KBytes) */ 63#define CONFIG_SYS_OCM_DATA_ADDR 0xF4000000 64#define CONFIG_SYS_OCM_DATA_SIZE 0x00001000 65/* Do not set up locked dcache as init ram. */ 66#undef CONFIG_SYS_INIT_DCACHE_CS 67 68/* Use the On-Chip-Memory (OCM) as a temporary stack for the startup code. */ 69#define CONFIG_SYS_TEMP_STACK_OCM 1 70 71#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* OCM */ 72#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE 73#define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */ 74#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) 75#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR 76 77/*----------------------------------------------------------------------- 78 * Serial Port 79 *----------------------------------------------------------------------*/ 80/* 81 * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1. 82 * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31. 83 * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value. 84 * The Linux BASE_BAUD define should match this configuration. 85 * baseBaud = cpuClock/(uartDivisor*16) 86 * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock, 87 * set Linux BASE_BAUD to 403200. 88 */ 89/* needed to be able to define CONFIG_SERIAL_SOFTWARE_FIFO */ 90#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */ 91#define CONFIG_SYS_BASE_BAUD 691200 92 93/* Size (bytes) of interrupt driven serial port buffer. 94 * Set to 0 to use polling instead of interrupts. 95 * Setting to 0 will also disable RTS/CTS handshaking. 96 */ 97#undef CONFIG_SERIAL_SOFTWARE_FIFO 98 99/* Set console baudrate to 9600 */ 100#define CONFIG_BAUDRATE 9600 101 102/*----------------------------------------------------------------------- 103 * Flash 104 *----------------------------------------------------------------------*/ 105 106/* Use common CFI driver */ 107#define CONFIG_SYS_FLASH_CFI 108#define CONFIG_FLASH_CFI_DRIVER 109/* board provides its own flash_init code */ 110#define CONFIG_FLASH_CFI_LEGACY 1 111#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT 112#define CONFIG_SYS_FLASH_LEGACY_512Kx8 1 113 114/* print 'E' for empty sector on flinfo */ 115#define CONFIG_SYS_FLASH_EMPTY_INFO 116 117#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 118#define CONFIG_SYS_MAX_FLASH_SECT 8 /* max number of sectors on one chip */ 119 120/*----------------------------------------------------------------------- 121 * Environment 122 *----------------------------------------------------------------------*/ 123 124#undef CONFIG_ENV_IS_IN_NVRAM 125#define CONFIG_ENV_IS_IN_FLASH 126#undef CONFIG_ENV_IS_NOWHERE 127 128#ifdef CONFIG_ENV_IS_IN_EEPROM 129/* Put the environment after the SDRAM configuration */ 130#define PROM_SIZE 2048 131#define CONFIG_ENV_OFFSET 512 132#define CONFIG_ENV_SIZE (PROM_SIZE-CONFIG_ENV_OFFSET) 133#endif 134 135#ifdef CONFIG_ENV_IS_IN_FLASH 136/* Put the environment in Flash */ 137#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ 138#define CONFIG_ENV_ADDR ((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE) 139#define CONFIG_ENV_SIZE 8*1024 /* 8 KB Environment Sector */ 140 141/* Address and size of Redundant Environment Sector */ 142#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) 143#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) 144#endif 145 146/*----------------------------------------------------------------------- 147 * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the 148 * the first internal I2C controller of the PPC440EPx 149 *----------------------------------------------------------------------*/ 150#define CONFIG_SYS_SPD_BUS_NUM 0 151 152/* Setup some board specific values for the default environment variables */ 153#define CONFIG_IPADDR 172.25.1.25 154 155#define CONFIG_EXTRA_ENV_SETTINGS \ 156 CONFIG_NETSTAL_DEF_ENV \ 157 CONFIG_NETSTAL_DEF_ENV_POWERPC \ 158 "" 159 160/* 161 * BOOTP options 162 */ 163#define CONFIG_BOOTP_BOOTFILESIZE 164#define CONFIG_BOOTP_BOOTPATH 165#define CONFIG_BOOTP_GATEWAY 166#define CONFIG_BOOTP_HOSTNAME 167 168/* 169 * Command line configuration. 170 */ 171#include <config_cmd_default.h> 172 173#define CONFIG_CMD_ASKENV 174#define CONFIG_CMD_CACHE 175#define CONFIG_CMD_DHCP 176#define CONFIG_CMD_DIAG 177#define CONFIG_CMD_EEPROM 178#define CONFIG_CMD_ELF 179#define CONFIG_CMD_FLASH 180#define CONFIG_CMD_I2C 181#define CONFIG_CMD_IMMAP 182#define CONFIG_CMD_IRQ 183#define CONFIG_CMD_MII 184#define CONFIG_CMD_NET 185#define CONFIG_CMD_PING 186#define CONFIG_CMD_REGINFO 187#define CONFIG_CMD_SDRAM 188 189/* SPD EEPROM (sdram speed config) disabled */ 190#define CONFIG_SPD_EEPROM 1 191#define SPD_EEPROM_ADDRESS 0x50 192 193/* POST support */ 194#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \ 195 CONFIG_SYS_POST_CPU | \ 196 CONFIG_SYS_POST_UART | \ 197 CONFIG_SYS_POST_I2C | \ 198 CONFIG_SYS_POST_CACHE | \ 199 CONFIG_SYS_POST_ETHER | \ 200 CONFIG_SYS_POST_SPR) 201 202#define CONFIG_SYS_POST_UART_TABLE {UART0_BASE} 203#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) 204#undef CONFIG_LOGBUFFER 205#define CONFIG_SYS_POST_CACHE_ADDR 0x00800000 /* free virtual address */ 206#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */ 207 208/*----------------------------------------------------------------------- 209 * Miscellaneous configurable options 210 *----------------------------------------------------------------------*/ 211#define CONFIG_SYS_LONGHELP /* undef to save memory */ 212#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ 213#if defined(CONFIG_CMD_KGDB) 214 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 215#else 216 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 217#endif 218#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 219#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 220#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 221 222#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */ 223#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ 224 225 226#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ 227 228/*----------------------------------------------------------------------- 229 * External Bus Controller (EBC) Setup 230 */ 231 232#define CONFIG_SYS_EBC_CFG 0x98400000 233 234/* Memory Bank 0 (Flash Bank 0) initialization */ 235#define CONFIG_SYS_EBC_PB0AP 0x02005400 236#define CONFIG_SYS_EBC_PB0CR 0xFFF18000 /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit*/ 237 238#define CONFIG_SYS_EBC_PB1AP 0x03041200 239#define CONFIG_SYS_EBC_PB1CR 0x7009A000 /* BAS=,BS=MB,BU=R/W,BW=bit */ 240 241#define CONFIG_SYS_EBC_PB2AP 0x01845200u /* BAS=,BS=MB,BU=R/W,BW=bit */ 242#define CONFIG_SYS_EBC_PB2CR 0x7A09A000u 243 244#define CONFIG_SYS_EBC_PB3AP 0x01845200u /* BAS=,BS=MB,BU=R/W,BW=bit */ 245#define CONFIG_SYS_EBC_PB3CR 0x7B09A000u 246 247#define CONFIG_SYS_EBC_PB4AP 0x01845200u /* BAS=,BS=MB,BU=R/W,BW=bit */ 248#define CONFIG_SYS_EBC_PB4CR 0x7C09A000u 249 250#define CONFIG_SYS_EBC_PB5AP 0x00800200u 251#define CONFIG_SYS_EBC_PB5CR 0x7D81A000u 252 253#define CONFIG_SYS_EBC_PB6AP 0x01040200u 254#define CONFIG_SYS_EBC_PB6CR 0x7D91A000u 255 256#define CONFIG_SYS_GPIO0_OR 0x087FFFFF /* GPIO value */ 257#define CONFIG_SYS_GPIO0_TCR 0x7FFF8000 /* GPIO value */ 258#define CONFIG_SYS_GPIO0_ODR 0xFFFF0000 /* GPIO value */ 259/* 260 * For booting Linux, the board info and command line data 261 * have to be in the first 8 MB of memory, since this is 262 * the maximum mapped by the Linux kernel during initialization. 263 */ 264#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ 265 266/* Init Memory Controller: 267 * 268 * BR0/1 and OR0/1 (FLASH) 269 */ 270 271#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */ 272#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */ 273 274 275/* Configuration Port location */ 276#define CONFIG_PORT_ADDR 0xF0000500 277 278#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 279#ifdef CONFIG_SYS_HUSH_PARSER 280#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 281#endif 282 283#if defined(CONFIG_CMD_KGDB) 284#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ 285#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ 286#endif 287 288#endif /* __CONFIG_H */ 289