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32
33#ifndef __CONFIG_H
34#define __CONFIG_H
35
36
37#define CONFIG_FIT 1
38#define CONFIG_OF_LIBFDT 1
39#define CONFIG_FIT_VERBOSE 1
40
41
42#define CONFIG_BOOKE 1
43#define CONFIG_E500 1
44#define CONFIG_MPC85xx 1
45#define CONFIG_MPC8544 1
46#define CONFIG_SOCRATES 1
47
48#define CONFIG_PCI
49
50#define CONFIG_TSEC_ENET
51
52#define CONFIG_MISC_INIT_R 1
53#define CONFIG_BOARD_EARLY_INIT_R 1
54
55#define CONFIG_FSL_LAW 1
56
57
58
59
60#define CONFIG_ENABLE_36BIT_PHYS 1
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76#ifndef CONFIG_SYS_CLK_FREQ
77#define CONFIG_SYS_CLK_FREQ 66666666
78#endif
79
80
81
82
83#define CONFIG_L2_CACHE
84#define CONFIG_BTB
85
86#define CONFIG_SYS_INIT_DBCR DBCR_IDM
87
88#undef CONFIG_SYS_DRAM_TEST
89#define CONFIG_SYS_MEMTEST_START 0x00400000
90#define CONFIG_SYS_MEMTEST_END 0x00C00000
91
92
93
94
95
96#define CONFIG_SYS_CCSRBAR_DEFAULT 0xFF700000
97#define CONFIG_SYS_CCSRBAR 0xE0000000
98#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR
99#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR
100
101
102#define CONFIG_FSL_DDR2
103#undef CONFIG_FSL_DDR_INTERACTIVE
104#define CONFIG_SPD_EEPROM
105#define CONFIG_DDR_SPD
106
107#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER
108#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
109
110#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
111#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
112#define CONFIG_VERY_BIG_RAM
113
114#define CONFIG_NUM_DDR_CONTROLLERS 1
115#define CONFIG_DIMM_SLOTS_PER_CTLR 1
116#define CONFIG_CHIP_SELECTS_PER_CTRL 2
117
118
119#define SPD_EEPROM_ADDRESS 0x50
120
121#define CONFIG_DDR_DEFAULT_CL 30
122
123
124#define CONFIG_SYS_DDR_CS0_BNDS 0x0000000f
125#define CONFIG_SYS_DDR_CS0_CONFIG 0x80010102
126#define CONFIG_SYS_DDR_TIMING_0 0x00260802
127#define CONFIG_SYS_DDR_TIMING_1 0x3935D322
128#define CONFIG_SYS_DDR_TIMING_2 0x14904CC8
129#define CONFIG_SYS_DDR_MODE 0x00480432
130#define CONFIG_SYS_DDR_INTERVAL 0x030C0100
131#define CONFIG_SYS_DDR_CONFIG_2 0x04400000
132#define CONFIG_SYS_DDR_CONFIG 0xC3008000
133#define CONFIG_SYS_DDR_CLK_CONTROL 0x03800000
134#define CONFIG_SYS_SDRAM_SIZE 256
135
136
137
138
139#define CONFIG_SYS_LBC_CACHE_BASE 0xf0000000
140
141#define CONFIG_SYS_FLASH0 0xFE000000
142#define CONFIG_SYS_FLASH1 0xFC000000
143#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH1, CONFIG_SYS_FLASH0 }
144
145#define CONFIG_SYS_LBC_FLASH_BASE CONFIG_SYS_FLASH1
146#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_LBC_FLASH_BASE
147
148#define CONFIG_SYS_BR0_PRELIM 0xfe001001
149#define CONFIG_SYS_OR0_PRELIM 0xfe000030
150#define CONFIG_SYS_BR1_PRELIM 0xfc001001
151#define CONFIG_SYS_OR1_PRELIM 0xfe000030
152
153#define CONFIG_SYS_FLASH_CFI
154#define CONFIG_FLASH_CFI_DRIVER
155
156#define CONFIG_SYS_MAX_FLASH_BANKS 2
157#define CONFIG_SYS_MAX_FLASH_SECT 256
158#undef CONFIG_SYS_FLASH_CHECKSUM
159#define CONFIG_SYS_FLASH_ERASE_TOUT 60000
160#define CONFIG_SYS_FLASH_WRITE_TOUT 500
161
162#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
163
164#define CONFIG_SYS_LBC_LCRR 0x00030004
165#define CONFIG_SYS_LBC_LBCR 0x00000000
166#define CONFIG_SYS_LBC_LSRT 0x20000000
167#define CONFIG_SYS_LBC_MRTPR 0x20000000
168
169#define CONFIG_SYS_INIT_RAM_LOCK 1
170#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000
171#define CONFIG_SYS_INIT_RAM_END 0x4000
172
173#define CONFIG_SYS_GBL_DATA_SIZE 128
174#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
175#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
176
177#define CONFIG_SYS_MONITOR_LEN (384 * 1024)
178#define CONFIG_SYS_MALLOC_LEN (4 << 20)
179
180
181#define CONFIG_SYS_FPGA_BASE 0xc0000000
182#define CONFIG_SYS_FPGA_SIZE 0x00100000
183#define CONFIG_SYS_HMI_BASE 0xc0010000
184#define CONFIG_SYS_BR3_PRELIM 0xc0001881
185#define CONFIG_SYS_OR3_PRELIM 0xfff00000
186
187#define CONFIG_SYS_NAND_BASE (CONFIG_SYS_FPGA_BASE + 0x70)
188#define CONFIG_SYS_MAX_NAND_DEVICE 1
189#define CONFIG_CMD_NAND
190
191
192#define CONFIG_SYS_LIME_BASE 0xc8000000
193#define CONFIG_SYS_LIME_SIZE 0x04000000
194#define CONFIG_SYS_BR2_PRELIM 0xc80018a1
195#define CONFIG_SYS_OR2_PRELIM 0xfc000000
196
197#define CONFIG_VIDEO
198#define CONFIG_VIDEO_MB862xx
199#define CONFIG_VIDEO_MB862xx_ACCEL
200#define CONFIG_CFB_CONSOLE
201#define CONFIG_VIDEO_LOGO
202#define CONFIG_VIDEO_BMP_LOGO
203#define CONFIG_CONSOLE_EXTRA_INFO
204#define VIDEO_FB_16BPP_PIXEL_SWAP
205#define VIDEO_FB_16BPP_WORD_SWAP
206#define CONFIG_VGA_AS_SINGLE_DEVICE
207#define CONFIG_SYS_CONSOLE_IS_IN_ENV
208#define CONFIG_VIDEO_SW_CURSOR
209#define CONFIG_SPLASH_SCREEN
210#define CONFIG_VIDEO_BMP_GZIP
211#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
212
213
214#define CONFIG_SYS_MB862xx_CCF 0x10000
215
216#define CONFIG_SYS_MB862xx_MMR 0x4157BA63
217
218
219
220#define CONFIG_CONS_INDEX 1
221#undef CONFIG_SERIAL_SOFTWARE_FIFO
222#define CONFIG_SYS_NS16550
223#define CONFIG_SYS_NS16550_SERIAL
224#define CONFIG_SYS_NS16550_REG_SIZE 1
225#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
226
227#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
228#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
229
230#define CONFIG_BAUDRATE 115200
231
232#define CONFIG_SYS_BAUDRATE_TABLE \
233 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
234
235#define CONFIG_CMDLINE_EDITING 1
236#define CONFIG_SYS_HUSH_PARSER 1
237#ifdef CONFIG_SYS_HUSH_PARSER
238#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
239#endif
240
241
242
243
244
245#define CONFIG_FSL_I2C
246#define CONFIG_HARD_I2C
247#undef CONFIG_SOFT_I2C
248#define CONFIG_SYS_I2C_SPEED 102124
249#define CONFIG_SYS_I2C_SLAVE 0x7F
250#define CONFIG_SYS_I2C_OFFSET 0x3000
251
252#define CONFIG_I2C_MULTI_BUS
253#define CONFIG_SYS_I2C2_OFFSET 0x3100
254
255
256#define CONFIG_RTC_RX8025
257#define CONFIG_SYS_I2C_RTC_ADDR 0x32
258
259
260#define CONFIG_SYS_I2C_W83782G_ADDR 0x28
261
262
263
264#define CONFIG_DTT_LM75 1
265#define CONFIG_DTT_SENSORS {4}
266#define CONFIG_SYS_DTT_MAX_TEMP 125
267#define CONFIG_SYS_DTT_LOW_TEMP -55
268#define CONFIG_SYS_DTT_HYSTERESIS 3
269#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
270
271
272
273
274
275#define CONFIG_SYS_PCI_PHYS 0x80000000
276
277
278#define CONFIG_PCI_CLK_FREQ 33000000
279#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000
280#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE
281#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000
282#define CONFIG_SYS_PCI1_IO_BASE 0xE2000000
283#define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BASE
284#define CONFIG_SYS_PCI1_IO_SIZE 0x01000000
285
286#if defined(CONFIG_PCI)
287#define CONFIG_PCI_PNP
288#undef CONFIG_PCI_SCAN_SHOW
289#endif
290
291
292#define CONFIG_NET_MULTI 1
293#define CONFIG_MII 1
294#define CONFIG_TSEC1 1
295#define CONFIG_TSEC1_NAME "TSEC0"
296#define CONFIG_TSEC3 1
297#define CONFIG_TSEC3_NAME "TSEC1"
298#undef CONFIG_MPC85XX_FEC
299
300#define TSEC1_PHY_ADDR 0
301#define TSEC3_PHY_ADDR 1
302
303#define TSEC1_PHYIDX 0
304#define TSEC3_PHYIDX 0
305#define TSEC1_FLAGS TSEC_GIGABIT
306#define TSEC3_FLAGS TSEC_GIGABIT
307
308
309#define CONFIG_ETHPRIME "TSEC0"
310#define CONFIG_PHY_GIGE 1
311
312#define CONFIG_HAS_ETH0
313#define CONFIG_HAS_ETH1
314
315
316
317
318#define CONFIG_ENV_IS_IN_FLASH 1
319#define CONFIG_ENV_SECT_SIZE 0x20000
320#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
321#define CONFIG_ENV_SIZE 0x4000
322#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
323#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
324
325#define CONFIG_LOADS_ECHO 1
326#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
327
328#define CONFIG_TIMESTAMP
329
330
331
332
333
334#define CONFIG_BOOTP_BOOTFILESIZE
335#define CONFIG_BOOTP_BOOTPATH
336#define CONFIG_BOOTP_GATEWAY
337#define CONFIG_BOOTP_HOSTNAME
338
339
340
341
342
343#include <config_cmd_default.h>
344
345#define CONFIG_CMD_BMP
346#define CONFIG_CMD_DATE
347#define CONFIG_CMD_DHCP
348#define CONFIG_CMD_DTT
349#undef CONFIG_CMD_EEPROM
350#define CONFIG_CMD_EXT2
351#define CONFIG_CMD_I2C
352#define CONFIG_CMD_SDRAM
353#define CONFIG_CMD_MII
354#undef CONFIG_CMD_NFS
355#define CONFIG_CMD_PING
356#define CONFIG_CMD_SNTP
357#define CONFIG_CMD_USB
358
359#if defined(CONFIG_PCI)
360 #define CONFIG_CMD_PCI
361#endif
362
363#undef CONFIG_WATCHDOG
364
365
366
367
368#define CONFIG_SYS_LONGHELP
369#define CONFIG_SYS_LOAD_ADDR 0x2000000
370#define CONFIG_SYS_PROMPT "=> "
371
372#if defined(CONFIG_CMD_KGDB)
373 #define CONFIG_SYS_CBSIZE 1024
374#else
375 #define CONFIG_SYS_CBSIZE 256
376#endif
377
378#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
379#define CONFIG_SYS_MAXARGS 16
380#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
381#define CONFIG_SYS_HZ 1000
382
383
384
385
386
387
388#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
389
390
391
392
393
394
395#define BOOTFLAG_COLD 0x01
396#define BOOTFLAG_WARM 0x02
397
398#if defined(CONFIG_CMD_KGDB)
399#define CONFIG_KGDB_BAUDRATE 230400
400#define CONFIG_KGDB_SER_INDEX 2
401#endif
402
403
404#define CONFIG_LOADADDR 200000
405
406#define CONFIG_BOOTDELAY 1
407
408#define CONFIG_PREBOOT "echo;" \
409 "echo Welcome on the ABB Socrates Board;" \
410 "echo"
411
412#undef CONFIG_BOOTARGS
413
414#define CONFIG_EXTRA_ENV_SETTINGS \
415 "netdev=eth0\0" \
416 "consdev=ttyS0\0" \
417 "uboot_file=/home/tftp/syscon3/u-boot.bin\0" \
418 "bootfile=/home/tftp/syscon3/uImage\0" \
419 "fdt_file=/home/tftp/syscon3/socrates.dtb\0" \
420 "initrd_file=/home/tftp/syscon3/uinitrd.gz\0" \
421 "uboot_addr=FFFA0000\0" \
422 "kernel_addr=FE000000\0" \
423 "fdt_addr=FE1E0000\0" \
424 "ramdisk_addr=FE200000\0" \
425 "fdt_addr_r=B00000\0" \
426 "kernel_addr_r=200000\0" \
427 "ramdisk_addr_r=400000\0" \
428 "rootpath=/opt/eldk/ppc_85xxDP\0" \
429 "ramargs=setenv bootargs root=/dev/ram rw\0" \
430 "nfsargs=setenv bootargs root=/dev/nfs rw " \
431 "nfsroot=$serverip:$rootpath\0" \
432 "addcons=setenv bootargs $bootargs " \
433 "console=$consdev,$baudrate\0" \
434 "addip=setenv bootargs $bootargs " \
435 "ip=$ipaddr:$serverip:$gatewayip:$netmask" \
436 ":$hostname:$netdev:off panic=1\0" \
437 "boot_nor=run ramargs addcons;" \
438 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
439 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
440 "tftp ${fdt_addr_r} ${fdt_file}; " \
441 "run nfsargs addip addcons;" \
442 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
443 "update_uboot=tftp 100000 ${uboot_file};" \
444 "protect off fffa0000 ffffffff;" \
445 "era fffa0000 ffffffff;" \
446 "cp.b 100000 fffa0000 ${filesize};" \
447 "setenv filesize;saveenv\0" \
448 "update_kernel=tftp 100000 ${bootfile};" \
449 "era fe000000 fe1dffff;" \
450 "cp.b 100000 fe000000 ${filesize};" \
451 "setenv filesize;saveenv\0" \
452 "update_fdt=tftp 100000 ${fdt_file};" \
453 "era fe1e0000 fe1fffff;" \
454 "cp.b 100000 fe1e0000 ${filesize};" \
455 "setenv filesize;saveenv\0" \
456 "update_initrd=tftp 100000 ${initrd_file};" \
457 "era fe200000 fe9fffff;" \
458 "cp.b 100000 fe200000 ${filesize};" \
459 "setenv filesize;saveenv\0" \
460 "clean_data=era fea00000 fff5ffff\0" \
461 "usbargs=setenv bootargs root=/dev/sda1 rw\0" \
462 "load_usb=usb start;" \
463 "ext2load usb 0:1 ${kernel_addr_r} /boot/uImage\0" \
464 "boot_usb=run load_usb usbargs addcons;" \
465 "bootm ${kernel_addr_r} - ${fdt_addr};" \
466 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
467 ""
468#define CONFIG_BOOTCOMMAND "run boot_nor"
469
470
471#define CONFIG_OF_LIBFDT 1
472#define CONFIG_OF_BOARD_SETUP 1
473
474
475#define CONFIG_USB_OHCI_NEW 1
476#define CONFIG_PCI_OHCI 1
477#define CONFIG_PCI_OHCI_DEVNO 3
478#define CONFIG_PCI_EHCI_DEVNO (CONFIG_PCI_OHCI_DEVNO / 2)
479#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
480#define CONFIG_SYS_USB_OHCI_SLOT_NAME "ohci_pci"
481#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS 1
482#define CONFIG_DOS_PARTITION 1
483#define CONFIG_USB_STORAGE 1
484
485#endif
486