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26#include <common.h>
27#include <asm/io.h>
28
29DECLARE_GLOBAL_DATA_PTR;
30
31#ifdef CONFIG_HARD_I2C
32
33#include <i2c.h>
34
35
36static unsigned int bus_num __attribute__ ((section (".data"))) = 0;
37
38#define I2C_TIMEOUT 100
39#define I2C_RETRIES 3
40
41struct mpc512x_i2c_tap {
42 int scl2tap;
43 int tap2tap;
44};
45
46static int mpc_reg_in(volatile u32 *reg);
47static void mpc_reg_out(volatile u32 *reg, int val, int mask);
48static int wait_for_bb(void);
49static int wait_for_pin(int *status);
50static int do_address(uchar chip, char rdwr_flag);
51static int send_bytes(uchar chip, char *buf, int len);
52static int receive_bytes(uchar chip, char *buf, int len);
53static int mpc_get_fdr(int);
54
55static int mpc_reg_in (volatile u32 *reg)
56{
57 int ret = in_be32(reg) >> 24;
58
59 return ret;
60}
61
62static void mpc_reg_out (volatile u32 *reg, int val, int mask)
63{
64 if (!mask) {
65 out_be32(reg, val << 24);
66 } else {
67 clrsetbits_be32(reg, mask << 24, (val & mask) << 24);
68 }
69}
70
71static int wait_for_bb (void)
72{
73 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
74 volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
75 int timeout = I2C_TIMEOUT;
76 int status;
77
78 status = mpc_reg_in (®s->msr);
79
80 while (timeout-- && (status & I2C_BB)) {
81 volatile int temp;
82 mpc_reg_out (®s->mcr, I2C_STA, I2C_STA);
83 temp = mpc_reg_in (®s->mdr);
84 mpc_reg_out (®s->mcr, 0, I2C_STA);
85 mpc_reg_out (®s->mcr, 0, 0);
86 mpc_reg_out (®s->mcr, I2C_EN, 0);
87
88 udelay (1000);
89 status = mpc_reg_in (®s->msr);
90 }
91
92 return (status & I2C_BB);
93}
94
95static int wait_for_pin (int *status)
96{
97 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
98 volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
99 int timeout = I2C_TIMEOUT;
100
101 *status = mpc_reg_in (®s->msr);
102
103 while (timeout-- && !(*status & I2C_IF)) {
104 udelay (1000);
105 *status = mpc_reg_in (®s->msr);
106 }
107
108 if (!(*status & I2C_IF)) {
109 return -1;
110 }
111
112 mpc_reg_out (®s->msr, 0, I2C_IF);
113
114 return 0;
115}
116
117static int do_address (uchar chip, char rdwr_flag)
118{
119 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
120 volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
121 int status;
122
123 chip <<= 1;
124
125 if (rdwr_flag) {
126 chip |= 1;
127 }
128
129 mpc_reg_out (®s->mcr, I2C_TX, I2C_TX);
130 mpc_reg_out (®s->mdr, chip, 0);
131
132 if (wait_for_pin (&status)) {
133 return -2;
134 }
135
136 if (status & I2C_RXAK) {
137 return -3;
138 }
139
140 return 0;
141}
142
143static int send_bytes (uchar chip, char *buf, int len)
144{
145 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
146 volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
147 int wrcount;
148 int status;
149
150 for (wrcount = 0; wrcount < len; ++wrcount) {
151
152 mpc_reg_out (®s->mdr, buf[wrcount], 0);
153
154 if (wait_for_pin (&status)) {
155 break;
156 }
157
158 if (status & I2C_RXAK) {
159 break;
160 }
161
162 }
163
164 return !(wrcount == len);
165}
166
167static int receive_bytes (uchar chip, char *buf, int len)
168{
169 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
170 volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
171 int dummy = 1;
172 int rdcount = 0;
173 int status;
174 int i;
175
176 mpc_reg_out (®s->mcr, 0, I2C_TX);
177
178 for (i = 0; i < len; ++i) {
179 buf[rdcount] = mpc_reg_in (®s->mdr);
180
181 if (dummy) {
182 dummy = 0;
183 } else {
184 rdcount++;
185 }
186
187 if (wait_for_pin (&status)) {
188 return -4;
189 }
190 }
191
192 mpc_reg_out (®s->mcr, I2C_TXAK, I2C_TXAK);
193 buf[rdcount++] = mpc_reg_in (®s->mdr);
194
195 if (wait_for_pin (&status)) {
196 return -5;
197 }
198
199 mpc_reg_out (®s->mcr, 0, I2C_TXAK);
200
201 return 0;
202}
203
204
205
206void i2c_init (int speed, int saddr)
207{
208 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
209 int i;
210
211 for (i = 0; i < I2C_BUS_CNT; i++){
212 volatile i2c512x_dev_t *regs = &im->i2c.dev[i];
213
214 mpc_reg_out (®s->mcr, 0, 0);
215
216
217 mpc_reg_out (®s->mfdr, mpc_get_fdr (speed), 0);
218 mpc_reg_out (®s->madr, saddr << 1, 0);
219
220
221 mpc_reg_out (®s->mcr, I2C_EN, I2C_INIT_MASK);
222 mpc_reg_out (®s->msr, 0, I2C_IF);
223 }
224
225
226 out_be32(&im->i2c.icr, 0);
227
228
229 out_be32(&im->i2c.mifr, 0);
230}
231
232static int mpc_get_fdr (int speed)
233{
234 static int fdr = -1;
235
236 if (fdr == -1) {
237 ulong best_speed = 0;
238 ulong divider;
239 ulong ips, scl;
240 ulong bestmatch = 0xffffffffUL;
241 int best_i = 0, best_j = 0, i, j;
242 int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8};
243 struct mpc512x_i2c_tap scltap[] = {
244 {4, 1},
245 {4, 2},
246 {6, 4},
247 {6, 8},
248 {14, 16},
249 {30, 32},
250 {62, 64},
251 {126, 128}
252 };
253
254 ips = gd->ips_clk;
255 for (i = 7; i >= 0; i--) {
256 for (j = 7; j >= 0; j--) {
257 scl = 2 * (scltap[j].scl2tap +
258 (SCL_Tap[i] - 1) * scltap[j].tap2tap
259 + 2);
260 if (ips <= speed*scl) {
261 if ((speed*scl - ips) < bestmatch) {
262 bestmatch = speed*scl - ips;
263 best_i = i;
264 best_j = j;
265 best_speed = ips/scl;
266 }
267 }
268 }
269 }
270 divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
271 if (gd->flags & GD_FLG_RELOC) {
272 fdr = divider;
273 } else {
274 debug("%ld kHz, \n", best_speed / 1000);
275 return divider;
276 }
277 }
278
279 return fdr;
280}
281
282int i2c_probe (uchar chip)
283{
284 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
285 volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
286 int i;
287
288 for (i = 0; i < I2C_RETRIES; i++) {
289 mpc_reg_out (®s->mcr, I2C_STA, I2C_STA);
290
291 if (! do_address (chip, 0)) {
292 mpc_reg_out (®s->mcr, 0, I2C_STA);
293 udelay (500);
294 break;
295 }
296
297 mpc_reg_out (®s->mcr, 0, I2C_STA);
298 udelay (500);
299 }
300
301 return (i == I2C_RETRIES);
302}
303
304int i2c_read (uchar chip, uint addr, int alen, uchar *buf, int len)
305{
306 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
307 volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
308 char xaddr[4];
309 int ret = -1;
310
311 xaddr[0] = (addr >> 24) & 0xFF;
312 xaddr[1] = (addr >> 16) & 0xFF;
313 xaddr[2] = (addr >> 8) & 0xFF;
314 xaddr[3] = addr & 0xFF;
315
316 if (wait_for_bb ()) {
317 printf ("i2c_read: bus is busy\n");
318 goto Done;
319 }
320
321 mpc_reg_out (®s->mcr, I2C_STA, I2C_STA);
322 if (do_address (chip, 0)) {
323 printf ("i2c_read: failed to address chip\n");
324 goto Done;
325 }
326
327 if (send_bytes (chip, &xaddr[4-alen], alen)) {
328 printf ("i2c_read: send_bytes failed\n");
329 goto Done;
330 }
331
332 mpc_reg_out (®s->mcr, I2C_RSTA, I2C_RSTA);
333 if (do_address (chip, 1)) {
334 printf ("i2c_read: failed to address chip\n");
335 goto Done;
336 }
337
338 if (receive_bytes (chip, (char *)buf, len)) {
339 printf ("i2c_read: receive_bytes failed\n");
340 goto Done;
341 }
342
343 ret = 0;
344Done:
345 mpc_reg_out (®s->mcr, 0, I2C_STA);
346 return ret;
347}
348
349int i2c_write (uchar chip, uint addr, int alen, uchar *buf, int len)
350{
351 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
352 volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
353 char xaddr[4];
354 int ret = -1;
355
356 xaddr[0] = (addr >> 24) & 0xFF;
357 xaddr[1] = (addr >> 16) & 0xFF;
358 xaddr[2] = (addr >> 8) & 0xFF;
359 xaddr[3] = addr & 0xFF;
360
361 if (wait_for_bb ()) {
362 printf ("i2c_write: bus is busy\n");
363 goto Done;
364 }
365
366 mpc_reg_out (®s->mcr, I2C_STA, I2C_STA);
367 if (do_address (chip, 0)) {
368 printf ("i2c_write: failed to address chip\n");
369 goto Done;
370 }
371
372 if (send_bytes (chip, &xaddr[4-alen], alen)) {
373 printf ("i2c_write: send_bytes failed\n");
374 goto Done;
375 }
376
377 if (send_bytes (chip, (char *)buf, len)) {
378 printf ("i2c_write: send_bytes failed\n");
379 goto Done;
380 }
381
382 ret = 0;
383Done:
384 mpc_reg_out (®s->mcr, 0, I2C_STA);
385 return ret;
386}
387
388int i2c_set_bus_num (unsigned int bus)
389{
390 if (bus >= I2C_BUS_CNT) {
391 return -1;
392 }
393 bus_num = bus;
394
395 return 0;
396}
397
398unsigned int i2c_get_bus_num (void)
399{
400 return bus_num;
401}
402
403#endif
404
