LXR uboot/board/assabet/setup.S

   1/*
   2 * Memory Setup stuff - taken from blob memsetup.S
   3 *
   4 * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
   5 *                     Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
   6 * 2004 (c) MontaVista Software, Inc.
   7 *
   8 * See file CREDITS for list of people who contributed to this
   9 * project.
  10 *
  11 * This program is free software; you can redistribute it and/or
  12 * modify it under the terms of the GNU General Public License as
  13 * published by the Free Software Foundation; either version 2 of
  14 * the License, or (at your option) any later version.
  15 *
  16 * This program is distributed in the hope that it will be useful,
  17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 * GNU General Public License for more details.
  20 *
  21 * You should have received a copy of the GNU General Public License
  22 * along with this program; if not, write to the Free Software
  23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24 * MA 02111-1307 USA
  25 */
  26
  27
  28#include "config.h"
  29#include "version.h"
  30
  31
  32/*-----------------------------------------------------------------------
  33 * Board defines:
  34 */
  35
  36#define MDCNFG          0x00
  37#define MDCAS00         0x04
  38#define MDCAS01         0x08
  39#define MDCAS02         0x0C
  40#define MSC0            0x10
  41#define MSC1            0x14
  42#define MECR            0x18
  43#define MDREFR          0x1C
  44#define MDCAS20         0x20
  45#define MDCAS21         0x24
  46#define MDCAS22         0x28
  47#define MSC2            0x2C
  48#define SMCNFG          0x30
  49
  50#define ASSABET_BCR             (0x12000000)
  51#define ASSABET_BCR_DB1110      (0x00a07490 | (0<<16) | (0<<17))
  52#define ASSABET_SCR_nNEPONSET   (1 << 9)
  53#define NEPONSET_LEDS           (0x10000010)
  54
  55
  56/*-----------------------------------------------------------------------
  57 * Setup parameters for the board:
  58 */
  59
  60
  61MEM_BASE:       .long   0xa0000000
  62MEM_START:      .long   0xc0000000
  63
  64mdcnfg:         .long   0x72547254
  65mdcas00:        .long   0xaaaaaa7f
  66mdcas01:        .long   0xaaaaaaaa
  67mdcas02:        .long   0xaaaaaaaa
  68msc0:           .long   0x4b384370
  69msc1:           .long   0x22212419
  70mecr:           .long   0x994a994a
  71mdrefr:         .long   0x04340327
  72mdcas20:        .long   0xaaaaaa7f
  73mdcas21:        .long   0xaaaaaaaa
  74mdcas22:        .long   0xaaaaaaaa
  75msc2:           .long   0x42196669
  76smcnfg:         .long   0x00000000
  77
  78BCR:            .long   ASSABET_BCR
  79BCR_DB1110:     .long   ASSABET_BCR_DB1110
  80LEDS:           .long   NEPONSET_LEDS
  81
  82
  83        .globl lowlevel_init
  84lowlevel_init:
  85
  86        /* Setting up the memory and stuff */
  87
  88        ldr     r0, MEM_BASE
  89        ldr     r1, mdcas00
  90        str     r1, [r0, #MDCAS00]
  91        ldr     r1, mdcas01
  92        str     r1, [r0, #MDCAS01]
  93        ldr     r1, mdcas02
  94        str     r1, [r0, #MDCAS02]
  95        ldr     r1, mdcas20
  96        str     r1, [r0, #MDCAS20]
  97        ldr     r1, mdcas21
  98        str     r1, [r0, #MDCAS21]
  99        ldr     r1, mdcas22
 100        str     r1, [r0, #MDCAS22]
 101        ldr     r1, mdrefr
 102        str     r1, [r0, #MDREFR]
 103        ldr     r1, mecr
 104        str     r1, [r0, #MECR]
 105        ldr     r1, msc0
 106        str     r1, [r0, #MSC0]
 107        ldr     r1, msc1
 108        str     r1, [r0, #MSC1]
 109        ldr     r1, msc2
 110        str     r1, [r0, #MSC2]
 111        ldr     r1, smcnfg
 112        str     r1, [r0, #SMCNFG]
 113
 114        ldr     r1, mdcnfg
 115        str     r1, [r0, #MDCNFG]
 116
 117        /* Load something to activate bank */
 118        ldr     r2, MEM_START
 119.rept   8
 120        ldr     r3, [r2]
 121.endr
 122
 123        /* Enable SDRAM */
 124        orr     r1, r1, #0x00000001
 125        str     r1, [r0, #MDCNFG]
 126
 127        ldr     r1, BCR
 128        ldr     r2, BCR_DB1110
 129        str     r2, [r1]
 130
 131        ldr     r1, LEDS
 132        mov     r0, #0x3
 133        str     r0, [r1]
 134
 135        /* All done... */
 136        mov     pc, lr
 137