uboot/board/ms7720se/lowlevel_init.S
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   1/*
   2 * (C) Copyright 2007
   3 * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
   4 *
   5 * This program is free software; you can redistribute it and/or
   6 * modify it under the terms of the GNU General Public License as
   7 * published by the Free Software Foundation; either version 2 of
   8 * the License, or (at your option) any later version.
   9 *
  10 * This program is distributed in the hope that it will be useful,
  11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 * GNU General Public License for more details.
  14 *
  15 * You should have received a copy of the GNU General Public License
  16 * along with this program; if not, write to the Free Software
  17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  18 * MA 02111-1307 USA
  19 */
  20
  21#include <asm/macro.h>
  22
  23        .global lowlevel_init
  24
  25        .text
  26        .align  2
  27
  28lowlevel_init:
  29
  30        write16 WTCSR_A, WTCSR_D
  31
  32        write16 WTCNT_A, WTCNT_D
  33
  34        write16 FRQCR_A, FRQCR_D
  35
  36        write16 UCLKCR_A, UCLKCR_D
  37
  38        write32 CMNCR_A, CMNCR_D
  39
  40        write32 CMNCR_A, CMNCR_D
  41
  42        write32 CS0BCR_A, CS0BCR_D
  43
  44        write32 CS2BCR_A, CS2BCR_D
  45
  46        write32 CS3BCR_A, CS3BCR_D
  47
  48        write32 CS4BCR_A, CS4BCR_D
  49
  50        write32 CS5ABCR_A, CS5ABCR_D
  51
  52        write32 CS5BBCR_A, CS5BBCR_D
  53
  54        write32 CS6ABCR_A, CS6ABCR_D
  55
  56        write32 CS6BBCR_A, CS6BBCR_D
  57
  58        write32 CS0WCR_A, CS0WCR_D
  59
  60        write32 CS2WCR_A, CS2WCR_D
  61
  62        write32 CS3WCR_A, CS3WCR_D
  63
  64        write32 CS4WCR_A, CS4WCR_D
  65
  66        write32 CS5AWCR_A, CS5AWCR_D
  67
  68        write32 CS5BWCR_A, CS5BWCR_D
  69
  70        write32 CS6AWCR_A, CS6AWCR_D
  71
  72        write32 CS6BWCR_A, CS6BWCR_D
  73
  74        write32 SDCR_A, SDCR_D1
  75
  76        write32 RTCSR_A, RTCSR_D
  77
  78        write32 RTCNT_A RTCNT_D
  79
  80        write32 RTCOR_A, RTCOR_D
  81
  82        write32 SDCR_A, SDCR_D2
  83
  84        write16 SDMR3_A, SDMR3_D
  85
  86        write16 PCCR_A, PCCR_D
  87
  88        write16 PDCR_A, PDCR_D
  89
  90        write16 PECR_A, PECR_D
  91
  92        write16 PGCR_A, PGCR_D
  93
  94        write16 PHCR_A, PHCR_D
  95
  96        write16 PPCR_A, PPCR_D
  97
  98        write16 PTCR_A, PTCR_D
  99
 100        write16 PVCR_A, PVCR_D
 101
 102        write16 PSELA_A, PSELA_D
 103
 104        write32 CCR_A, CCR_D
 105
 106        write8  LED_A, LED_D
 107
 108        rts
 109         nop
 110
 111        .align 4
 112
 113FRQCR_A:        .long   0xA415FF80      /* FRQCR Address */
 114WTCNT_A:        .long   0xA415FF84
 115WTCSR_A:        .long   0xA415FF86
 116UCLKCR_A:       .long   0xA40A0008
 117FRQCR_D:        .word   0x1103          /* I:B:P=8:4:2 */
 118WTCNT_D:        .word   0x5A00
 119WTCSR_D:        .word   0xA506
 120UCLKCR_D:       .word   0xA5C0
 121
 122#define BSC_BASE        0xA4FD0000
 123CMNCR_A:        .long   BSC_BASE
 124CS0BCR_A:       .long   BSC_BASE + 0x04
 125CS2BCR_A:       .long   BSC_BASE + 0x08
 126CS3BCR_A:       .long   BSC_BASE + 0x0C
 127CS4BCR_A:       .long   BSC_BASE + 0x10
 128CS5ABCR_A:      .long   BSC_BASE + 0x14
 129CS5BBCR_A:      .long   BSC_BASE + 0x18
 130CS6ABCR_A:      .long   BSC_BASE + 0x1C
 131CS6BBCR_A:      .long   BSC_BASE + 0x20
 132CS0WCR_A:       .long   BSC_BASE + 0x24
 133CS2WCR_A:       .long   BSC_BASE + 0x28
 134CS3WCR_A:       .long   BSC_BASE + 0x2C
 135CS4WCR_A:       .long   BSC_BASE + 0x30
 136CS5AWCR_A:      .long   BSC_BASE + 0x34
 137CS5BWCR_A:      .long   BSC_BASE + 0x38
 138CS6AWCR_A:      .long   BSC_BASE + 0x3C
 139CS6BWCR_A:      .long   BSC_BASE + 0x40
 140SDCR_A:         .long   BSC_BASE + 0x44
 141RTCSR_A:        .long   BSC_BASE + 0x48
 142RTCNT_A:        .long   BSC_BASE + 0x4C
 143RTCOR_A:        .long   BSC_BASE + 0x50
 144SDMR3_A:        .long   BSC_BASE + 0x58C0
 145
 146CMNCR_D:        .long   0x00000010
 147CS0BCR_D:       .long   0x36DB0400
 148CS2BCR_D:       .long   0x36DB0400
 149CS3BCR_D:       .long   0x36DB4600
 150CS4BCR_D:       .long   0x36DB0400
 151CS5ABCR_D:      .long   0x36DB0400
 152CS5BBCR_D:      .long   0x36DB0200
 153CS6ABCR_D:      .long   0x36DB0400
 154CS6BBCR_D:      .long   0x36DB0400
 155CS0WCR_D:       .long   0x00000B01
 156CS2WCR_D:       .long   0x00000500
 157CS3WCR_D:       .long   0x00006D1B
 158CS4WCR_D:       .long   0x00000500
 159CS5AWCR_D:      .long   0x00000500
 160CS5BWCR_D:      .long   0x00000500
 161CS6AWCR_D:      .long   0x00000500
 162CS6BWCR_D:      .long   0x00000500
 163SDCR_D1:        .long   0x00000011
 164RTCSR_D:        .long   0xA55A0010
 165RTCNT_D:        .long   0xA55A001F
 166RTCOR_D:        .long   0xA55A001F
 167SDMR3_D:        .word   0x0000
 168.align 2
 169SDCR_D2:        .long   0x00000811
 170
 171#define PFC_BASE        0xA4050100
 172PCCR_A:         .long   PFC_BASE + 0x04
 173PDCR_A:         .long   PFC_BASE + 0x06
 174PECR_A:         .long   PFC_BASE + 0x08
 175PGCR_A:         .long   PFC_BASE + 0x0C
 176PHCR_A:         .long   PFC_BASE + 0x0E
 177PPCR_A:         .long   PFC_BASE + 0x18
 178PTCR_A:         .long   PFC_BASE + 0x1E
 179PVCR_A:         .long   PFC_BASE + 0x22
 180PSELA_A:        .long   PFC_BASE + 0x24
 181
 182PCCR_D:         .word   0x0000
 183PDCR_D:         .word   0x0000
 184PECR_D:         .word   0x0000
 185PGCR_D:         .word   0x0000
 186PHCR_D:         .word   0x0000
 187PPCR_D:         .word   0x00AA
 188PTCR_D:         .word   0x0280
 189PVCR_D:         .word   0x0000
 190PSELA_D:        .word   0x0000
 191.align 2
 192
 193CCR_A:          .long   0xFFFFFFEC
 194!CCR_D:         .long   0x0000000D
 195CCR_D:          .long   0x0000000B
 196
 197LED_A:          .long   0xB6800000
 198LED_D:          .long   0xFF
 199