LXR uboot/board/pb1x00/pb1x00.c

   1/*
   2 * (C) Copyright 2003
   3 * Thomas.Lange@corelatus.se
   4 *
   5 * See file CREDITS for list of people who contributed to this
   6 * project.
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License as
  10 * published by the Free Software Foundation; either version 2 of
  11 * the License, or (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, write to the Free Software
  20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21 * MA 02111-1307 USA
  22 */
  23
  24#include <common.h>
  25#include <command.h>
  26#include <asm/au1x00.h>
  27#include <asm/mipsregs.h>
  28#include <asm/io.h>
  29
  30phys_size_t initdram(int board_type)
  31{
  32        /* Sdram is setup by assembler code */
  33        /* If memory could be changed, we should return the true value here */
  34        return 64*1024*1024;
  35}
  36
  37#define BCSR_PCMCIA_PC0DRVEN            0x0010
  38#define BCSR_PCMCIA_PC0RST              0x0080
  39
  40/* In arch/mips/cpu/cpu.c */
  41void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 );
  42
  43int checkboard (void)
  44{
  45#if defined(CONFIG_IDE_PCMCIA) && 0
  46        u16 status;
  47#endif
  48        /* volatile u32 *pcmcia_bcsr = (u32*)(DB1000_BCSR_ADDR+0x10); */
  49        volatile u32 *sys_counter = (volatile u32*)SYS_COUNTER_CNTRL;
  50        u32 proc_id;
  51
  52        *sys_counter = 0x100; /* Enable 32 kHz oscillator for RTC/TOY */
  53
  54        proc_id = read_c0_prid();
  55
  56        switch (proc_id >> 24) {
  57        case 0:
  58                puts ("Board: Pb1000\n");
  59                printf ("CPU: Au1000 396 MHz, id: 0x%02x, rev: 0x%02x\n",
  60                        (proc_id >> 8) & 0xFF, proc_id & 0xFF);
  61                break;
  62        case 1:
  63                puts ("Board: Pb1500\n");
  64                printf ("CPU: Au1500, id: 0x%02x, rev: 0x%02x\n",
  65                        (proc_id >> 8) & 0xFF, proc_id & 0xFF);
  66                break;
  67        case 2:
  68                puts ("Board: Pb1100\n");
  69                printf ("CPU: Au1100, id: 0x%02x, rev: 0x%02x\n",
  70                        (proc_id >> 8) & 0xFF, proc_id & 0xFF);
  71                break;
  72        default:
  73                printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id);
  74        }
  75
  76        set_io_port_base(0);
  77
  78#if defined(CONFIG_IDE_PCMCIA) && 0
  79        /* Enable 3.3 V on slot 0 ( VCC )
  80           No 5V */
  81        status = 4;
  82        *pcmcia_bcsr = status;
  83
  84        status |= BCSR_PCMCIA_PC0DRVEN;
  85        *pcmcia_bcsr = status;
  86        au_sync();
  87
  88        udelay(300*1000);
  89
  90        status |= BCSR_PCMCIA_PC0RST;
  91        *pcmcia_bcsr = status;
  92        au_sync();
  93
  94        udelay(100*1000);
  95
  96        /* PCMCIA is on a 36 bit physical address.
  97           We need to map it into a 32 bit addresses */
  98
  99#if 0
 100        /* We dont need theese unless we run whole pcmcia package */
 101        write_one_tlb(20,                 /* index */
 102                      0x01ffe000,         /* Pagemask, 16 MB pages */
 103                      CONFIG_SYS_PCMCIA_IO_BASE, /* Hi */
 104                      0x3C000017,         /* Lo0 */
 105                      0x3C200017);        /* Lo1 */
 106
 107        write_one_tlb(21,                   /* index */
 108                      0x01ffe000,           /* Pagemask, 16 MB pages */
 109                      CONFIG_SYS_PCMCIA_ATTR_BASE, /* Hi */
 110                      0x3D000017,           /* Lo0 */
 111                      0x3D200017);          /* Lo1 */
 112#endif  /* 0 */
 113        write_one_tlb(22,                   /* index */
 114                      0x01ffe000,           /* Pagemask, 16 MB pages */
 115                      CONFIG_SYS_PCMCIA_MEM_ADDR,  /* Hi */
 116                      0x3E000017,           /* Lo0 */
 117                      0x3E200017);          /* Lo1 */
 118#endif  /* CONFIG_IDE_PCMCIA */
 119
 120        return 0;
 121}
 122