1/* 2 * Copyright (C) 2005-2006 Atmel Corporation 3 * 4 * See file CREDITS for list of people who contributed to this 5 * project. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of 10 * the License, or (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * MA 02111-1307 USA 21 */ 22#ifndef __CPU_AT32AP_ATMEL_MCI_H__ 23#define __CPU_AT32AP_ATMEL_MCI_H__ 24 25#ifndef __ASSEMBLY__ 26 27/* 28 * Structure for struct SoC access. 29 * Names starting with '_' are fillers. 30 */ 31typedef struct atmel_mci { 32 /* reg Offset */ 33 u32 cr; /* 0x00 */ 34 u32 mr; /* 0x04 */ 35 u32 dtor; /* 0x08 */ 36 u32 sdcr; /* 0x0c */ 37 u32 argr; /* 0x10 */ 38 u32 cmdr; /* 0x14 */ 39 u32 _18; /* 0x18 */ 40 u32 _1c; /* 0x1c */ 41 u32 rspr; /* 0x20 */ 42 u32 rspr1; /* 0x24 */ 43 u32 rspr2; /* 0x28 */ 44 u32 rspr3; /* 0x2c */ 45 u32 rdr; /* 0x30 */ 46 u32 tdr; /* 0x34 */ 47 u32 _38; /* 0x38 */ 48 u32 _3c; /* 0x3c */ 49 u32 sr; /* 0x40 */ 50 u32 ier; /* 0x44 */ 51 u32 idr; /* 0x48 */ 52 u32 imr; /* 0x4c */ 53} atmel_mci_t; 54 55#endif /* __ASSEMBLY__ */ 56 57/* 58 * NOTICE: Use of registers offsets is depreciated. 59 * These defines will be removed once the old driver 60 * is taken out of commision. 61 * 62 * Atmel MultiMedia Card Interface (MCI) registers 63 */ 64#define MMCI_CR 0x0000 65#define MMCI_MR 0x0004 66#define MMCI_DTOR 0x0008 67#define MMCI_SDCR 0x000c 68#define MMCI_ARGR 0x0010 69#define MMCI_CMDR 0x0014 70#define MMCI_RSPR 0x0020 71#define MMCI_RSPR1 0x0024 72#define MMCI_RSPR2 0x0028 73#define MMCI_RSPR3 0x002c 74#define MMCI_RDR 0x0030 75#define MMCI_TDR 0x0034 76#define MMCI_SR 0x0040 77#define MMCI_IER 0x0044 78#define MMCI_IDR 0x0048 79#define MMCI_IMR 0x004c 80 81/* Bitfields in CR */ 82#define MMCI_MCIEN_OFFSET 0 83#define MMCI_MCIEN_SIZE 1 84#define MMCI_MCIDIS_OFFSET 1 85#define MMCI_MCIDIS_SIZE 1 86#define MMCI_PWSEN_OFFSET 2 87#define MMCI_PWSEN_SIZE 1 88#define MMCI_PWSDIS_OFFSET 3 89#define MMCI_PWSDIS_SIZE 1 90#define MMCI_SWRST_OFFSET 7 91#define MMCI_SWRST_SIZE 1 92 93/* Bitfields in MR */ 94#define MMCI_CLKDIV_OFFSET 0 95#define MMCI_CLKDIV_SIZE 8 96#define MMCI_PWSDIV_OFFSET 8 97#define MMCI_PWSDIV_SIZE 3 98#define MMCI_RDPROOF_OFFSET 11 99#define MMCI_RDPROOF_SIZE 1 100#define MMCI_WRPROOF_OFFSET 12 101#define MMCI_WRPROOF_SIZE 1 102#define MMCI_PDCPADV_OFFSET 14 103#define MMCI_PDCPADV_SIZE 1 104#define MMCI_PDCMODE_OFFSET 15 105#define MMCI_PDCMODE_SIZE 1 106#define MMCI_BLKLEN_OFFSET 16 107#define MMCI_BLKLEN_SIZE 16 108 109/* Bitfields in DTOR */ 110#define MMCI_DTOCYC_OFFSET 0 111#define MMCI_DTOCYC_SIZE 4 112#define MMCI_DTOMUL_OFFSET 4 113#define MMCI_DTOMUL_SIZE 3 114 115/* Bitfields in SDCR */ 116#define MMCI_SCDSEL_OFFSET 0 117#define MMCI_SCDSEL_SIZE 4 118#define MMCI_SCDBUS_OFFSET 7 119#define MMCI_SCDBUS_SIZE 1 120 121/* Bitfields in ARGR */ 122#define MMCI_ARG_OFFSET 0 123#define MMCI_ARG_SIZE 32 124 125/* Bitfields in CMDR */ 126#define MMCI_CMDNB_OFFSET 0 127#define MMCI_CMDNB_SIZE 6 128#define MMCI_RSPTYP_OFFSET 6 129#define MMCI_RSPTYP_SIZE 2 130#define MMCI_SPCMD_OFFSET 8 131#define MMCI_SPCMD_SIZE 3 132#define MMCI_OPDCMD_OFFSET 11 133#define MMCI_OPDCMD_SIZE 1 134#define MMCI_MAXLAT_OFFSET 12 135#define MMCI_MAXLAT_SIZE 1 136#define MMCI_TRCMD_OFFSET 16 137#define MMCI_TRCMD_SIZE 2 138#define MMCI_TRDIR_OFFSET 18 139#define MMCI_TRDIR_SIZE 1 140#define MMCI_TRTYP_OFFSET 19 141#define MMCI_TRTYP_SIZE 2 142 143/* Bitfields in RSPRx */ 144#define MMCI_RSP_OFFSET 0 145#define MMCI_RSP_SIZE 32 146 147/* Bitfields in SR/IER/IDR/IMR */ 148#define MMCI_CMDRDY_OFFSET 0 149#define MMCI_CMDRDY_SIZE 1 150#define MMCI_RXRDY_OFFSET 1 151#define MMCI_RXRDY_SIZE 1 152#define MMCI_TXRDY_OFFSET 2 153#define MMCI_TXRDY_SIZE 1 154#define MMCI_BLKE_OFFSET 3 155#define MMCI_BLKE_SIZE 1 156#define MMCI_DTIP_OFFSET 4 157#define MMCI_DTIP_SIZE 1 158#define MMCI_NOTBUSY_OFFSET 5 159#define MMCI_NOTBUSY_SIZE 1 160#define MMCI_ENDRX_OFFSET 6 161#define MMCI_ENDRX_SIZE 1 162#define MMCI_ENDTX_OFFSET 7 163#define MMCI_ENDTX_SIZE 1 164#define MMCI_RXBUFF_OFFSET 14 165#define MMCI_RXBUFF_SIZE 1 166#define MMCI_TXBUFE_OFFSET 15 167#define MMCI_TXBUFE_SIZE 1 168#define MMCI_RINDE_OFFSET 16 169#define MMCI_RINDE_SIZE 1 170#define MMCI_RDIRE_OFFSET 17 171#define MMCI_RDIRE_SIZE 1 172#define MMCI_RCRCE_OFFSET 18 173#define MMCI_RCRCE_SIZE 1 174#define MMCI_RENDE_OFFSET 19 175#define MMCI_RENDE_SIZE 1 176#define MMCI_RTOE_OFFSET 20 177#define MMCI_RTOE_SIZE 1 178#define MMCI_DCRCE_OFFSET 21 179#define MMCI_DCRCE_SIZE 1 180#define MMCI_DTOE_OFFSET 22 181#define MMCI_DTOE_SIZE 1 182#define MMCI_OVRE_OFFSET 30 183#define MMCI_OVRE_SIZE 1 184#define MMCI_UNRE_OFFSET 31 185#define MMCI_UNRE_SIZE 1 186 187/* Constants for DTOMUL */ 188#define MMCI_DTOMUL_1_CYCLE 0 189#define MMCI_DTOMUL_16_CYCLES 1 190#define MMCI_DTOMUL_128_CYCLES 2 191#define MMCI_DTOMUL_256_CYCLES 3 192#define MMCI_DTOMUL_1024_CYCLES 4 193#define MMCI_DTOMUL_4096_CYCLES 5 194#define MMCI_DTOMUL_65536_CYCLES 6 195#define MMCI_DTOMUL_1048576_CYCLES 7 196 197/* Constants for RSPTYP */ 198#define MMCI_RSPTYP_NO_RESP 0 199#define MMCI_RSPTYP_48_BIT_RESP 1 200#define MMCI_RSPTYP_136_BIT_RESP 2 201 202/* Constants for SPCMD */ 203#define MMCI_SPCMD_NO_SPEC_CMD 0 204#define MMCI_SPCMD_INIT_CMD 1 205#define MMCI_SPCMD_SYNC_CMD 2 206#define MMCI_SPCMD_INT_CMD 4 207#define MMCI_SPCMD_INT_RESP 5 208 209/* Constants for TRCMD */ 210#define MMCI_TRCMD_NO_TRANS 0 211#define MMCI_TRCMD_START_TRANS 1 212#define MMCI_TRCMD_STOP_TRANS 2 213 214/* Constants for TRTYP */ 215#define MMCI_TRTYP_BLOCK 0 216#define MMCI_TRTYP_MULTI_BLOCK 1 217#define MMCI_TRTYP_STREAM 2 218 219/* Bit manipulation macros */ 220#define MMCI_BIT(name) \ 221 (1 << MMCI_##name##_OFFSET) 222#define MMCI_BF(name,value) \ 223 (((value) & ((1 << MMCI_##name##_SIZE) - 1)) \ 224 << MMCI_##name##_OFFSET) 225#define MMCI_BFEXT(name,value) \ 226 (((value) >> MMCI_##name##_OFFSET)\ 227 & ((1 << MMCI_##name##_SIZE) - 1)) 228#define MMCI_BFINS(name,value,old) \ 229 (((old) & ~(((1 << MMCI_##name##_SIZE) - 1) \ 230 << MMCI_##name##_OFFSET)) \ 231 | MMCI_BF(name,value)) 232 233/* 234 * NOTICE: Use of registers offsets is depreciated. 235 * These defines will be removed once the old driver 236 * is taken out of commision. 237 * 238 * Register access macros 239 */ 240#define mmci_readl(reg) \ 241 readl((void *)MMCI_BASE + MMCI_##reg) 242#define mmci_writel(reg,value) \ 243 writel((value), (void *)MMCI_BASE + MMCI_##reg) 244 245#endif /* __CPU_AT32AP_ATMEL_MCI_H__ */ 246