LXR uboot/drivers/pci/pci

   1/*
   2 * Support for indirect PCI bridges.
   3 *
   4 * Copyright (C) 1998 Gabriel Paubert.
   5 *
   6 * This program is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU General Public License
   8 * as published by the Free Software Foundation; either version
   9 * 2 of the License, or (at your option) any later version.
  10 */
  11
  12#include <common.h>
  13
  14#if (!defined(__I386__) && !defined(CONFIG_IXDP425))
  15
  16#include <asm/processor.h>
  17#include <asm/io.h>
  18#include <pci.h>
  19
  20#define cfg_read(val, addr, type, op)   *val = op((type)(addr))
  21#define cfg_write(val, addr, type, op)  op((type *)(addr), (val))
  22
  23#ifdef CONFIG_IXP425
  24extern unsigned char    in_8 (volatile unsigned *addr);
  25extern unsigned short   in_le16 (volatile unsigned *addr);
  26extern unsigned         in_le32 (volatile unsigned *addr);
  27extern void             out_8 (volatile unsigned *addr, char val);
  28extern void             out_le16 (volatile unsigned *addr, unsigned short val);
  29extern void             out_le32 (volatile unsigned *addr, unsigned int val);
  30#endif  /* CONFIG_IXP425 */
  31
  32#if defined(CONFIG_MPC8260)
  33#define INDIRECT_PCI_OP(rw, size, type, op, mask)                        \
  34static int                                                               \
  35indirect_##rw##_config_##size(struct pci_controller *hose,               \
  36                              pci_dev_t dev, int offset, type val)       \
  37{                                                                        \
  38        u32 b, d,f;                                                      \
  39        b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev);           \
  40        b = b - hose->first_busno;                                       \
  41        dev = PCI_BDF(b, d, f);                                          \
  42        out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000);    \
  43        sync();                                                          \
  44        cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
  45        return 0;                                                        \
  46}
  47#elif defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
  48#define INDIRECT_PCI_OP(rw, size, type, op, mask)                        \
  49static int                                                               \
  50indirect_##rw##_config_##size(struct pci_controller *hose,               \
  51                              pci_dev_t dev, int offset, type val)       \
  52{                                                                        \
  53        u32 b, d,f;                                                      \
  54        b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev);           \
  55        b = b - hose->first_busno;                                       \
  56        dev = PCI_BDF(b, d, f);                                          \
  57        *(hose->cfg_addr) = dev | (offset & 0xfc) | ((offset & 0xf00) << 16) | 0x80000000; \
  58        sync();                                                          \
  59        cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
  60        return 0;                                                        \
  61}
  62#elif defined(CONFIG_440GX)  || defined(CONFIG_440GP) || defined(CONFIG_440SP) || \
  63      defined(CONFIG_440SPE) || defined(CONFIG_460EX) || defined(CONFIG_460GT)
  64#define INDIRECT_PCI_OP(rw, size, type, op, mask)                        \
  65static int                                                               \
  66indirect_##rw##_config_##size(struct pci_controller *hose,               \
  67                              pci_dev_t dev, int offset, type val)       \
  68{                                                                        \
  69        u32 b, d,f;                                                      \
  70        b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev);           \
  71        b = b - hose->first_busno;                                       \
  72        dev = PCI_BDF(b, d, f);                                          \
  73        if (PCI_BUS(dev) > 0)                                            \
  74                out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000001); \
  75        else                                                             \
  76                out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
  77        cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
  78        return 0;                                                        \
  79}
  80#else
  81#define INDIRECT_PCI_OP(rw, size, type, op, mask)                        \
  82static int                                                               \
  83indirect_##rw##_config_##size(struct pci_controller *hose,               \
  84                              pci_dev_t dev, int offset, type val)       \
  85{                                                                        \
  86        u32 b, d,f;                                                      \
  87        b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev);           \
  88        b = b - hose->first_busno;                                       \
  89        dev = PCI_BDF(b, d, f);                                          \
  90        out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000);    \
  91        cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
  92        return 0;                                                        \
  93}
  94#endif
  95
  96#define INDIRECT_PCI_OP_ERRATA6(rw, size, type, op, mask)                \
  97static int                                                               \
  98indirect_##rw##_config_##size(struct pci_controller *hose,               \
  99                              pci_dev_t dev, int offset, type val)       \
 100{                                                                        \
 101        unsigned int msr = mfmsr();                                      \
 102        mtmsr(msr & ~(MSR_EE | MSR_CE));                                 \
 103        out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000);    \
 104        cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
 105        out_le32(hose->cfg_addr, 0x00000000);                            \
 106        mtmsr(msr);                                                      \
 107        return 0;                                                        \
 108}
 109
 110INDIRECT_PCI_OP(read, byte, u8 *, in_8, 3)
 111INDIRECT_PCI_OP(read, word, u16 *, in_le16, 2)
 112INDIRECT_PCI_OP(read, dword, u32 *, in_le32, 0)
 113#ifdef CONFIG_405GP
 114INDIRECT_PCI_OP_ERRATA6(write, byte, u8, out_8, 3)
 115INDIRECT_PCI_OP_ERRATA6(write, word, u16, out_le16, 2)
 116INDIRECT_PCI_OP_ERRATA6(write, dword, u32, out_le32, 0)
 117#else
 118INDIRECT_PCI_OP(write, byte, u8, out_8, 3)
 119INDIRECT_PCI_OP(write, word, u16, out_le16, 2)
 120INDIRECT_PCI_OP(write, dword, u32, out_le32, 0)
 121#endif
 122
 123void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
 124{
 125        pci_set_ops(hose,
 126                    indirect_read_config_byte,
 127                    indirect_read_config_word,
 128                    indirect_read_config_dword,
 129                    indirect_write_config_byte,
 130                    indirect_write_config_word,
 131                    indirect_write_config_dword);
 132
 133        hose->cfg_addr = (unsigned int *) cfg_addr;
 134        hose->cfg_data = (unsigned char *) cfg_data;
 135}
 136
 137#endif  /* !__I386__ && !CONFIG_IXDP425 */
 138