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28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31
32
33
34
35
36#define CONFIG_405EP 1
37#define CONFIG_4xx 1
38#define CONFIG_PLU405 1
39
40#define CONFIG_BOARD_EARLY_INIT_F 1
41#define CONFIG_MISC_INIT_R 1
42
43#define CONFIG_SYS_CLK_FREQ 33333400
44
45#define CONFIG_BAUDRATE 9600
46
47#undef CONFIG_BOOTARGS
48#undef CONFIG_BOOTCOMMAND
49
50#define CONFIG_PREBOOT
51
52#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
53
54#define CONFIG_NET_MULTI 1
55#undef CONFIG_HAS_ETH1
56
57#define CONFIG_PPC4xx_EMAC
58#define CONFIG_MII 1
59#define CONFIG_PHY_ADDR 0
60#define CONFIG_LXT971_NO_SLEEP 1
61#define CONFIG_RESET_PHY_R 1
62
63#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ
64
65
66
67
68
69#define CONFIG_BOOTP_BOOTFILESIZE
70#define CONFIG_BOOTP_BOOTPATH
71#define CONFIG_BOOTP_GATEWAY
72#define CONFIG_BOOTP_HOSTNAME
73
74
75
76
77
78#include <config_cmd_default.h>
79
80#define CONFIG_CMD_DHCP
81#define CONFIG_CMD_PCI
82#define CONFIG_CMD_IRQ
83#define CONFIG_CMD_IDE
84#define CONFIG_CMD_FAT
85#define CONFIG_CMD_ELF
86#define CONFIG_CMD_NAND
87#define CONFIG_CMD_DATE
88#define CONFIG_CMD_I2C
89#define CONFIG_CMD_MII
90#define CONFIG_CMD_PING
91#define CONFIG_CMD_EEPROM
92#define CONFIG_CMD_USB
93
94#define CONFIG_OF_LIBFDT
95#define CONFIG_OF_BOARD_SETUP
96
97#define CONFIG_MAC_PARTITION
98#define CONFIG_DOS_PARTITION
99
100#define CONFIG_SUPPORT_VFAT
101
102#undef CONFIG_WATCHDOG
103
104#define CONFIG_RTC_MC146818
105#define CONFIG_SYS_RTC_REG_BASE_ADDR 0xF0000500
106
107#define CONFIG_SDRAM_BANK0 1
108
109
110
111
112#define CONFIG_SYS_LONGHELP
113#define CONFIG_SYS_PROMPT "=> "
114
115#undef CONFIG_SYS_HUSH_PARSER
116#ifdef CONFIG_SYS_HUSH_PARSER
117#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
118#endif
119
120#if defined(CONFIG_CMD_KGDB)
121#define CONFIG_SYS_CBSIZE 1024
122#else
123#define CONFIG_SYS_CBSIZE 256
124#endif
125#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
126#define CONFIG_SYS_MAXARGS 16
127#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
128
129#define CONFIG_SYS_DEVICE_NULLDEV 1
130
131#define CONFIG_SYS_CONSOLE_INFO_QUIET 1
132
133#define CONFIG_AUTO_COMPLETE 1
134
135#define CONFIG_SYS_MEMTEST_START 0x0400000
136#define CONFIG_SYS_MEMTEST_END 0x0C00000
137
138#undef CONFIG_SYS_EXT_SERIAL_CLOCK
139#define CONFIG_SYS_BASE_BAUD 691200
140#undef CONFIG_UART1_CONSOLE
141
142
143#define CONFIG_SYS_BAUDRATE_TABLE \
144 { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \
145 57600, 115200, 230400, 460800, 921600 }
146
147#define CONFIG_SYS_LOAD_ADDR 0x100000
148#define CONFIG_SYS_EXTBDINFO 1
149
150#define CONFIG_SYS_HZ 1000
151
152#define CONFIG_CMDLINE_EDITING 1
153#define CONFIG_ZERO_BOOTDELAY_CHECK
154#define CONFIG_BOOTDELAY 3
155
156
157
158
159#define CONFIG_AUTOBOOT_KEYED 1
160#define CONFIG_AUTOBOOT_PROMPT \
161 "Press SPACE to abort autoboot in %d seconds\n", bootdelay
162#undef CONFIG_AUTOBOOT_DELAY_STR
163#define CONFIG_AUTOBOOT_STOP_STR " "
164
165#define CONFIG_VERSION_VARIABLE 1
166
167#define CONFIG_SYS_RX_ETH_BUFFER 16
168
169
170
171
172#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
173#define CONFIG_SYS_MAX_NAND_DEVICE 1
174#define NAND_BIG_DELAY_US 25
175
176#define CONFIG_SYS_NAND_CE (0x80000000 >> 1)
177#define CONFIG_SYS_NAND_RDY (0x80000000 >> 4)
178#define CONFIG_SYS_NAND_CLE (0x80000000 >> 2)
179#define CONFIG_SYS_NAND_ALE (0x80000000 >> 3)
180
181#define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1
182#define CONFIG_SYS_NAND_QUIET 1
183
184
185
186
187#define PCI_HOST_ADAPTER 0
188#define PCI_HOST_FORCE 1
189#define PCI_HOST_AUTO 2
190
191#define CONFIG_PCI
192#define CONFIG_PCI_HOST PCI_HOST_FORCE
193#define CONFIG_PCI_PNP
194
195
196#define CONFIG_PCI_SCAN_SHOW
197
198#define CONFIG_PCI_CONFIG_HOST_BRIDGE 1
199
200#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x12FE
201#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0405
202#define CONFIG_SYS_PCI_CLASSCODE 0x0b20
203#define CONFIG_SYS_PCI_PTM1LA 0x00000000
204#define CONFIG_SYS_PCI_PTM1MS 0xf8000001
205#define CONFIG_SYS_PCI_PTM1PCI 0x00000000
206#define CONFIG_SYS_PCI_PTM2LA 0xffc00000
207#define CONFIG_SYS_PCI_PTM2MS 0xffc00001
208#define CONFIG_SYS_PCI_PTM2PCI 0x08000000
209
210
211
212
213#undef CONFIG_IDE_8xx_DIRECT
214#undef CONFIG_IDE_LED
215#define CONFIG_IDE_RESET 1
216
217#define CONFIG_SYS_IDE_MAXBUS 1
218
219#define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*1)
220
221#define CONFIG_SYS_ATA_BASE_ADDR 0xF0100000
222#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
223
224#define CONFIG_SYS_ATA_DATA_OFFSET 0x0000
225#define CONFIG_SYS_ATA_REG_OFFSET 0x0000
226#define CONFIG_SYS_ATA_ALT_OFFSET 0x0000
227
228
229
230
231
232
233#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
234
235
236
237
238#define FLASH_BASE0_PRELIM 0xFFC00000
239
240#define CONFIG_SYS_MAX_FLASH_BANKS 1
241#define CONFIG_SYS_MAX_FLASH_SECT 256
242
243#define CONFIG_SYS_FLASH_ERASE_TOUT 120000
244#define CONFIG_SYS_FLASH_WRITE_TOUT 1000
245
246#define CONFIG_SYS_FLASH_WORD_SIZE unsigned short
247#define CONFIG_SYS_FLASH_ADDR0 0x5555
248#define CONFIG_SYS_FLASH_ADDR1 0x2AAA
249
250
251
252
253#define CONFIG_SYS_FLASH_READ0 0x0000
254#define CONFIG_SYS_FLASH_READ1 0x0001
255#define CONFIG_SYS_FLASH_READ2 0x0002
256
257#define CONFIG_SYS_FLASH_EMPTY_INFO
258
259
260
261
262
263
264#define CONFIG_SYS_SDRAM_BASE 0x00000000
265#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE
266#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
267#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1)
268#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
269
270
271
272
273#define CONFIG_ENV_IS_IN_EEPROM 1
274#define CONFIG_ENV_OFFSET 0x100
275#define CONFIG_ENV_SIZE 0x700
276
277
278
279
280#define CONFIG_HARD_I2C
281#define CONFIG_PPC4XX_I2C
282#define CONFIG_SYS_I2C_SPEED 400000
283#define CONFIG_SYS_I2C_SLAVE 0x7F
284
285#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
286#define CONFIG_SYS_EEPROM_WREN 1
287
288
289#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
290
291#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
292#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
293
294
295#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
296
297
298
299
300#define CAN0_BA 0xF0000000
301#define CAN1_BA 0xF0000100
302#define DUART0_BA 0xF0000400
303#define DUART1_BA 0xF0000408
304#define RTC_BA 0xF0000500
305#define VGA_BA 0xF1000000
306#define CONFIG_SYS_NAND_BASE 0xF4000000
307
308
309
310#define CONFIG_SYS_EBC_PB0AP 0x92015480
311
312#define CONFIG_SYS_EBC_PB0CR 0xFFC5A000
313
314
315#define CONFIG_SYS_EBC_PB1AP 0x92015480
316
317#define CONFIG_SYS_EBC_PB1CR 0xF4018000
318
319
320
321#define CONFIG_SYS_EBC_PB2AP 0x010053C0
322
323#define CONFIG_SYS_EBC_PB2CR 0xF0018000
324
325
326
327#define CONFIG_SYS_EBC_PB3AP 0x010053C0
328
329#define CONFIG_SYS_EBC_PB3CR 0xF011A000
330
331
332
333
334#define CONFIG_SYS_FPGA_BASE_ADDR 0xF0100100
335
336
337#define CONFIG_SYS_FPGA_CTRL 0x000
338
339
340#define CONFIG_SYS_FPGA_CTRL_CF_RESET 0x0001
341#define CONFIG_SYS_FPGA_CTRL_WDI 0x0002
342#define CONFIG_SYS_FPGA_CTRL_PS2_RESET 0x0020
343
344#define CONFIG_SYS_FPGA_SPARTAN2 1
345#define CONFIG_SYS_FPGA_MAX_SIZE 128*1024
346
347
348#define CONFIG_SYS_FPGA_PRG 0x04000000
349#define CONFIG_SYS_FPGA_CLK 0x02000000
350#define CONFIG_SYS_FPGA_DATA 0x01000000
351#define CONFIG_SYS_FPGA_INIT 0x00010000
352#define CONFIG_SYS_FPGA_DONE 0x00008000
353
354
355
356
357
358#define CONFIG_SYS_TEMP_STACK_OCM 1
359
360
361#define CONFIG_SYS_OCM_DATA_ADDR 0xF8000000
362#define CONFIG_SYS_OCM_DATA_SIZE 0x1000
363#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR
364#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE
365
366#define CONFIG_SYS_GBL_DATA_SIZE 128
367#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
368#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
369
370
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377
378
379
380
381
382#define CONFIG_SYS_GPIO0_OSRH 0x00000550
383#define CONFIG_SYS_GPIO0_OSRL 0x00000110
384#define CONFIG_SYS_GPIO0_ISR1H 0x00000000
385#define CONFIG_SYS_GPIO0_ISR1L 0x15555445
386#define CONFIG_SYS_GPIO0_TSRH 0x00000000
387#define CONFIG_SYS_GPIO0_TSRL 0x00000000
388#define CONFIG_SYS_GPIO0_TCR 0x77FE0014
389
390#define CONFIG_SYS_DUART_RST (0x80000000 >> 14)
391#define CONFIG_SYS_EEPROM_WP (0x80000000 >> 0)
392
393
394
395
396
397
398#define BOOTFLAG_COLD 0x01
399#define BOOTFLAG_WARM 0x02
400
401
402
403
404
405#if 1
406#define PLLMR0_DEFAULT PLLMR0_266_133_66_33
407#define PLLMR1_DEFAULT PLLMR1_266_133_66_33
408#endif
409#if 0
410#define PLLMR0_DEFAULT PLLMR0_200_100_50_33
411#define PLLMR1_DEFAULT PLLMR1_200_100_50_33
412#endif
413#if 0
414#define PLLMR0_DEFAULT PLLMR0_133_66_66_33
415#define PLLMR1_DEFAULT PLLMR1_133_66_66_33
416#endif
417
418
419
420
421#define CONFIG_USB_OHCI_NEW 1
422#define CONFIG_PCI_OHCI 1
423#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS 1
424#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
425#define CONFIG_SYS_USB_OHCI_SLOT_NAME "ohci_pci"
426#define CONFIG_USB_STORAGE 1
427
428
429
430
431#define CONFIG_CMD_UBI
432#define CONFIG_RBTREE
433#define CONFIG_MTD_DEVICE
434#define CONFIG_MTD_PARTITIONS
435#define CONFIG_CMD_MTDPARTS
436#define CONFIG_LZO
437
438#endif
439