1/* 2 * U-boot - Configuration file for CM-BF527 board 3 */ 4 5#ifndef __CONFIG_CM_BF527_H__ 6#define __CONFIG_CM_BF527_H__ 7 8#include <asm/config-pre.h> 9 10 11/* 12 * Processor Settings 13 */ 14#define CONFIG_BFIN_CPU bf527-0.0 15#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA 16 17 18/* 19 * Clock Settings 20 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV 21 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV 22 */ 23/* CONFIG_CLKIN_HZ is any value in Hz */ 24#define CONFIG_CLKIN_HZ 25000000 25/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ 26/* 1 = CLKIN / 2 */ 27#define CONFIG_CLKIN_HALF 0 28/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ 29/* 1 = bypass PLL */ 30#define CONFIG_PLL_BYPASS 0 31/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ 32/* Values can range from 0-63 (where 0 means 64) */ 33#define CONFIG_VCO_MULT 21 34/* CCLK_DIV controls the core clock divider */ 35/* Values can be 1, 2, 4, or 8 ONLY */ 36#define CONFIG_CCLK_DIV 1 37/* SCLK_DIV controls the system clock divider */ 38/* Values can range from 1-15 */ 39#define CONFIG_SCLK_DIV 4 40 41/* Decrease core voltage */ 42#define CONFIG_VR_CTL_VAL (VLEV_120 | CLKBUFOE | FREQ_1000) 43 44 45/* 46 * Memory Settings 47 */ 48#define CONFIG_MEM_ADD_WDTH 9 49#define CONFIG_MEM_SIZE 32 50 51#define CONFIG_EBIU_SDRRC_VAL 0x3f8 52#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd 53 54#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL) 55#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) 56#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) 57 58#define CONFIG_SYS_MONITOR_LEN (256 * 1024) 59#define CONFIG_SYS_MALLOC_LEN (128 * 1024) 60 61 62/* 63 * NAND Settings 64 * (can't be used sametime as ethernet) 65 */ 66/* #define CONFIG_BFIN_NFC */ 67#ifdef CONFIG_BFIN_NFC 68#define CONFIG_BFIN_NFC_CTL_VAL 0x0033 69#define CONFIG_SYS_NAND_BASE 0 /* not actually used */ 70#define CONFIG_SYS_MAX_NAND_DEVICE 1 71#define NAND_MAX_CHIPS 1 72#define CONFIG_CMD_NAND 73#endif 74 75 76/* 77 * Network Settings 78 */ 79#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) && \ 80 !defined(__ADSPBF524__) && !defined(__ADSPBF525__) && !defined(CONFIG_BFIN_NFC) 81#define ADI_CMDS_NETWORK 1 82#define CONFIG_BFIN_MAC 83#define CONFIG_RMII 84#define CONFIG_NETCONSOLE 1 85#define CONFIG_NET_MULTI 1 86#endif 87#define CONFIG_HOSTNAME cm-bf527 88/* Uncomment next line to use fixed MAC address */ 89/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ 90 91 92/* 93 * Flash Settings 94 */ 95#define CONFIG_FLASH_CFI_DRIVER 96#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS 97#define CONFIG_SYS_FLASH_BASE 0x20000000 98#define CONFIG_SYS_FLASH_CFI 99#define CONFIG_SYS_FLASH_PROTECTION 100#define CONFIG_SYS_MAX_FLASH_BANKS 1 101#define CONFIG_SYS_MAX_FLASH_SECT 67 102 103 104/* 105 * Env Storage Settings 106 */ 107#define CONFIG_ENV_IS_IN_FLASH 1 108#define CONFIG_ENV_ADDR 0x20008000 109#define CONFIG_ENV_OFFSET 0x8000 110#define CONFIG_ENV_SIZE 0x8000 111#define CONFIG_ENV_SECT_SIZE 0x8000 112#define CONFIG_ENV_IS_EMBEDDED_IN_LDR 113 114 115/* 116 * I2C Settings 117 */ 118#define CONFIG_BFIN_TWI_I2C 1 119#define CONFIG_HARD_I2C 1 120 121 122/* 123 * Misc Settings 124 */ 125#define CONFIG_BAUDRATE 115200 126#define CONFIG_MISC_INIT_R 127#define CONFIG_RTC_BFIN 128#define CONFIG_UART_CONSOLE 0 129#define CONFIG_BOOTCOMMAND "run flashboot" 130#define FLASHBOOT_ENV_SETTINGS \ 131 "flashboot=flread 20040000 1000000 300000;" \ 132 "bootm 0x1000000\0" 133 134 135/* 136 * Pull in common ADI header for remaining command/environment setup 137 */ 138#include <configs/bfin_adi_common.h> 139 140#endif 141