uboot/include/configs/ns9750dev.h
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   1/*
   2 * Copyright (C) 2004 by FS Forth-Systeme GmbH.
   3 * All rights reserved.
   4 * Markus Pietrek <mpietrek@fsforth.de>
   5 *
   6 * Configuation settings for the NetSilicon NS9750 DevBoard
   7 *
   8 * See file CREDITS for list of people who contributed to this
   9 * project.
  10 *
  11 * This program is free software; you can redistribute it and/or
  12 * modify it under the terms of the GNU General Public License as
  13 * published by the Free Software Foundation; either version 2 of
  14 * the License, or (at your option) any later version.
  15 *
  16 * This program is distributed in the hope that it will be useful,
  17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 * GNU General Public License for more details.
  20 *
  21 * You should have received a copy of the GNU General Public License
  22 * along with this program; if not, write to the Free Software
  23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24 * MA 02111-1307 USA
  25 */
  26
  27#ifndef __CONFIG_H
  28#define __CONFIG_H
  29
  30/*
  31 * High Level Configuration Options
  32 * (easy to change)
  33 */
  34#define CONFIG_ARM926EJS        1       /* This is an ARM926EJS Core    */
  35#define CONFIG_NS9750           1       /* in an NetSilicon NS9750 SoC     */
  36#define CONFIG_NS9750DEV        1       /* on an NetSilicon NS9750 DevBoard  */
  37
  38/* input clock of PLL */
  39#define CONFIG_SYS_CLK_FREQ     324403200 /* Don't use PLL. SW11-4 off */
  40
  41#define CPU_CLK_FREQ            (CONFIG_SYS_CLK_FREQ/2)
  42#define AHB_CLK_FREQ            (CONFIG_SYS_CLK_FREQ/4)
  43#define BBUS_CLK_FREQ           (CONFIG_SYS_CLK_FREQ/8)
  44
  45#undef CONFIG_USE_IRQ                   /* we don't need IRQ/FIQ stuff */
  46/*@TODO #define CONFIG_STATUS_LED*/
  47#define CONFIG_USE_IRQ
  48
  49/*
  50 * Size of malloc() pool
  51 */
  52#define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 128*1024)
  53#define CONFIG_SYS_GBL_DATA_SIZE       128     /* size in bytes reserved for initial
  54                                         * data */
  55
  56/*
  57 * Hardware drivers
  58 */
  59#define CONFIG_NS9750_UART              1       /* use on-chip UART */
  60#define CONFIG_DRIVER_NS9750_ETHERNET   1       /* use on-chip ethernet */
  61
  62/*
  63 * select serial console configuration
  64 */
  65#define CONFIG_CONS_INDEX          1            /* Port B */
  66
  67/* allow to overwrite serial and ethaddr */
  68#define CONFIG_ENV_OVERWRITE
  69
  70#define CONFIG_BAUDRATE         38400
  71
  72
  73/*
  74 * BOOTP options
  75 */
  76#define CONFIG_BOOTP_BOOTFILESIZE
  77#define CONFIG_BOOTP_BOOTPATH
  78#define CONFIG_BOOTP_GATEWAY
  79#define CONFIG_BOOTP_HOSTNAME
  80
  81
  82/*
  83 * Command line configuration.
  84 */
  85
  86#define CONFIG_CMD_BDI
  87#define CONFIG_CMD_CONSOLE
  88#define CONFIG_CMD_LOADB
  89#define CONFIG_CMD_LOADS
  90#define CONFIG_CMD_MEMORY
  91#define CONFIG_CMD_NET
  92#define CONFIG_CMD_PING
  93
  94
  95#define CONFIG_BOOTDELAY        3
  96/*#define CONFIG_BOOTARGS       "root=ramfs devfs=mount console=ttySA0,9600" */
  97
  98#define CONFIG_ETHADDR          00:04:f3:ff:ff:fb /*@TODO unset */
  99#define CONFIG_NETMASK          255.255.255.0
 100#define CONFIG_IPADDR           192.168.42.30
 101#define CONFIG_SERVERIP         192.168.42.1
 102
 103/*#define CONFIG_BOOTFILE       "elinos-lart" */
 104/*#define CONFIG_BOOTCOMMAND    "tftp; bootm" */
 105
 106#if defined(CONFIG_CMD_KGDB)
 107#define CONFIG_KGDB_BAUDRATE    115200          /* speed to run kgdb serial port */
 108/* what's this ? it's not used anywhere */
 109#define CONFIG_KGDB_SER_INDEX   1               /* which serial port to use */
 110#endif
 111
 112/*
 113 * Miscellaneous configurable options
 114 */
 115#define CONFIG_SYS_LONGHELP                             /* undef to save memory         */
 116#define CONFIG_SYS_PROMPT               "NS9750DEV # "  /* Monitor Command Prompt       */
 117#define CONFIG_SYS_CBSIZE               256             /* Console I/O Buffer Size      */
 118#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 119#define CONFIG_SYS_MAXARGS              16              /* max number of command args   */
 120#define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 121
 122#define CONFIG_SYS_MEMTEST_START        0x00000000      /* memtest works on     */
 123#define CONFIG_SYS_MEMTEST_END          0x00780000      /* 7,5 MB in DRAM       */ /* @TODO */
 124
 125#define CONFIG_SYS_LOAD_ADDR            0x00600000      /* default load address */ /* @TODO */
 126
 127#define CONFIG_SYS_HZ                   (CPU_CLK_FREQ/64)
 128
 129/* valid baudrates */
 130#define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
 131
 132#define NS9750_ETH_PHY_ADDRESS  (0x0000)
 133
 134/*-----------------------------------------------------------------------
 135 * Stack sizes
 136 *
 137 * The stack sizes are set up in start.S using the settings below
 138 */
 139#define CONFIG_STACKSIZE        (128*1024)      /* regular stack */
 140#ifdef CONFIG_USE_IRQ
 141#define CONFIG_STACKSIZE_IRQ    (4*1024)        /* IRQ stack */
 142#define CONFIG_STACKSIZE_FIQ    (4*1024)        /* FIQ stack */
 143#endif
 144
 145/*-----------------------------------------------------------------------
 146 * Physical Memory Map
 147 */
 148/* TODO */
 149#define CONFIG_NR_DRAM_BANKS    2          /* we have 1 bank of DRAM */
 150#define PHYS_SDRAM_1            0x00000000 /* SDRAM Bank #1 */
 151#define PHYS_SDRAM_1_SIZE       0x00800000 /* 8 MB */
 152#define PHYS_SDRAM_2            0x10000000 /* SDRAM Bank #1 */
 153#define PHYS_SDRAM_2_SIZE       0x00800000 /* 8 MB */
 154
 155#define PHYS_FLASH_1            0x50000000 /* Flash Bank #1 */
 156
 157#define CONFIG_SYS_FLASH_BASE           PHYS_FLASH_1
 158
 159/*-----------------------------------------------------------------------
 160 * FLASH and environment organization
 161 */
 162
 163/* @TODO*/
 164#define CONFIG_AMD_LV400        1       /* uncomment this if you have a LV400 flash */
 165#if 0
 166#define CONFIG_AMD_LV800        1       /* uncomment this if you have a LV800 flash */
 167#endif
 168
 169#define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks */
 170#ifdef CONFIG_AMD_LV800
 171#define PHYS_FLASH_SIZE         0x00100000 /* 1MB */
 172#define CONFIG_SYS_MAX_FLASH_SECT       (19)    /* max number of sectors on one chip */
 173#define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */
 174#endif
 175#ifdef CONFIG_AMD_LV400
 176#define PHYS_FLASH_SIZE         0x00080000 /* 512KB */
 177#define CONFIG_SYS_MAX_FLASH_SECT       (11)    /* max number of sectors on one chip */
 178#define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */
 179#endif
 180
 181/* timeout values are in ticks */
 182#define CONFIG_SYS_FLASH_ERASE_TOUT     (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
 183#define CONFIG_SYS_FLASH_WRITE_TOUT     (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */
 184
 185/* @TODO */
 186/*#define       CONFIG_ENV_IS_IN_FLASH  1*/
 187#define CONFIG_ENV_IS_NOWHERE
 188#define CONFIG_ENV_SIZE         0x10000 /* Total Size of Environment Sector */
 189
 190#ifdef CONFIG_STATUS_LED
 191
 192extern void __led_init(led_id_t mask, int state);
 193extern void __led_toggle(led_id_t mask);
 194extern void __led_set(led_id_t mask, int state);
 195
 196#endif /* CONFIG_STATUS_LED */
 197
 198#endif  /* __CONFIG_H */
 199