1/* 2 * Voipac PXA270 configuration file 3 * 4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 19 * MA 02111-1307 USA 20 */ 21 22#ifndef __CONFIG_H 23#define __CONFIG_H 24 25/* 26 * High Level Board Configuration Options 27 */ 28#define CONFIG_PXA27X 1 /* Marvell PXA270 CPU */ 29#define CONFIG_VPAC270 1 /* Voipac PXA270 board */ 30 31#undef BOARD_LATE_INIT 32#undef CONFIG_SKIP_RELOCATE_UBOOT 33#undef CONFIG_USE_IRQ 34#undef CONFIG_SKIP_LOWLEVEL_INIT 35 36/* 37 * Environment settings 38 */ 39#define CONFIG_ENV_SIZE 0x4000 40#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) 41#define CONFIG_SYS_GBL_DATA_SIZE 128 42 43#define CONFIG_ENV_OVERWRITE /* override default environment */ 44 45#define CONFIG_BOOTCOMMAND \ 46 "if mmc init && fatload mmc 0 0xa4000000 uImage; then " \ 47 "bootm 0xa4000000; " \ 48 "fi; " \ 49 "if usb reset && fatload usb 0 0xa4000000 uImage; then " \ 50 "bootm 0xa4000000; " \ 51 "fi; " \ 52 "bootm 0x40000;" 53#define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200" 54#define CONFIG_TIMESTAMP 55#define CONFIG_BOOTDELAY 2 /* Autoboot delay */ 56#define CONFIG_CMDLINE_TAG 57#define CONFIG_SETUP_MEMORY_TAGS 58 59#define CONFIG_LZMA /* LZMA compression support */ 60 61/* 62 * Serial Console Configuration 63 */ 64#define CONFIG_PXA_SERIAL 65#define CONFIG_FFUART 1 66#define CONFIG_BAUDRATE 115200 67#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 68 69/* 70 * Bootloader Components Configuration 71 */ 72#include <config_cmd_default.h> 73 74#define CONFIG_CMD_NET 75#define CONFIG_CMD_ENV 76#undef CONFIG_CMD_IMLS 77#define CONFIG_CMD_MMC 78#define CONFIG_CMD_USB 79#undef CONFIG_LCD 80#define CONFIG_CMD_IDE 81 82#ifdef CONFIG_ONENAND_U_BOOT 83#undef CONFIG_CMD_FLASH 84#define CONFIG_CMD_ONENAND 85#else 86#define CONFIG_CMD_FLASH 87#undef CONFIG_CMD_ONENAND 88#endif 89 90/* 91 * Networking Configuration 92 * chip on the Voipac PXA270 board 93 */ 94#ifdef CONFIG_CMD_NET 95#define CONFIG_CMD_PING 96#define CONFIG_CMD_DHCP 97 98#define CONFIG_NET_MULTI 1 99#define CONFIG_DRIVER_DM9000 1 100#define CONFIG_DM9000_BASE 0x08000300 /* CS2 */ 101#define DM9000_IO (CONFIG_DM9000_BASE) 102#define DM9000_DATA (CONFIG_DM9000_BASE + 4) 103#define CONFIG_NET_RETRY_COUNT 10 104 105#define CONFIG_BOOTP_BOOTFILESIZE 106#define CONFIG_BOOTP_BOOTPATH 107#define CONFIG_BOOTP_GATEWAY 108#define CONFIG_BOOTP_HOSTNAME 109#endif 110 111/* 112 * MMC Card Configuration 113 */ 114#ifdef CONFIG_CMD_MMC 115#define CONFIG_MMC 116#define CONFIG_PXA_MMC 117#define CONFIG_SYS_MMC_BASE 0xF0000000 118#define CONFIG_CMD_FAT 119#define CONFIG_DOS_PARTITION 120#endif 121 122/* 123 * KGDB 124 */ 125#ifdef CONFIG_CMD_KGDB 126#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ 127#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ 128#endif 129 130/* 131 * HUSH Shell Configuration 132 */ 133#define CONFIG_SYS_HUSH_PARSER 1 134#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 135 136#define CONFIG_SYS_LONGHELP /* undef to save memory */ 137#ifdef CONFIG_SYS_HUSH_PARSER 138#define CONFIG_SYS_PROMPT "$ " /* Monitor Command Prompt */ 139#else 140#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ 141#endif 142#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 143#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 144#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 145#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 146#define CONFIG_SYS_DEVICE_NULLDEV 1 147 148/* 149 * Clock Configuration 150 */ 151#undef CONFIG_SYS_CLKS_IN_HZ 152#define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */ 153#define CONFIG_SYS_CPUSPEED 0x190 /* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */ 154 155/* 156 * Stack sizes 157 * 158 * The stack sizes are set up in start.S using the settings below 159 */ 160#define CONFIG_STACKSIZE (128*1024) /* regular stack */ 161#ifdef CONFIG_USE_IRQ 162#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ 163#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ 164#endif 165 166/* 167 * DRAM Map 168 */ 169#define CONFIG_NR_DRAM_BANKS 2 /* We have 2 banks of DRAM */ 170#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ 171#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ 172#define PHYS_SDRAM_2 0x80000000 /* SDRAM Bank #2 */ 173#define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */ 174 175#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */ 176#define CONFIG_SYS_DRAM_SIZE 0x10000000 /* 256 MB DRAM */ 177 178#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ 179#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ 180 181#define CONFIG_SYS_LOAD_ADDR (0x5c000000) 182 183/* 184 * NOR FLASH 185 */ 186#if defined(CONFIG_CMD_FLASH) /* NOR */ 187#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ 188#define PHYS_FLASH_2 0x02000000 /* Flash Bank #2 */ 189 190#define CONFIG_SYS_FLASH_CFI 191#define CONFIG_FLASH_CFI_DRIVER 1 192 193#define CONFIG_SYS_MAX_FLASH_SECT (4 + 255) 194#define CONFIG_SYS_MAX_FLASH_BANKS 2 195#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 } 196 197#define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ) 198#define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ) 199 200#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 201#define CONFIG_SYS_FLASH_PROTECTION 1 202 203#define CONFIG_ENV_IS_IN_FLASH 1 204 205#elif defined(CONFIG_CMD_ONENAND) /* OneNAND */ 206#define CONFIG_SYS_NO_FLASH 207#define CONFIG_SYS_ONENAND_BASE 0x00000000 208#define CONFIG_ENV_IS_IN_ONENAND 1 209 210#else /* No flash */ 211#define CONFIG_SYS_NO_FLASH 212#define CONFIG_SYS_ENV_IS_NOWHERE 213#endif 214 215#define CONFIG_SYS_MONITOR_BASE 0x000000 216#define CONFIG_SYS_MONITOR_LEN 0x40000 217 218#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_LEN) 219#define CONFIG_ENV_SECT_SIZE 0x40000 220#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) 221#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) 222 223/* 224 * IDE 225 */ 226#ifdef CONFIG_CMD_IDE 227#define CONFIG_LBA48 228#undef CONFIG_IDE_LED 229#undef CONFIG_IDE_RESET 230 231#define __io 232 233#define CONFIG_SYS_IDE_MAXBUS 1 234#define CONFIG_SYS_IDE_MAXDEVICE 1 235 236#define CONFIG_SYS_ATA_BASE_ADDR 0x0c000000 237#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0 238 239#define CONFIG_SYS_ATA_DATA_OFFSET 0x120 240#define CONFIG_SYS_ATA_REG_OFFSET 0x120 241#define CONFIG_SYS_ATA_ALT_OFFSET 0x120 242 243#define CONFIG_SYS_ATA_STRIDE 2 244#endif 245 246/* 247 * GPIO settings 248 */ 249#define CONFIG_SYS_GPSR0_VAL 0x01308800 250#define CONFIG_SYS_GPSR1_VAL 0x00cf0000 251#define CONFIG_SYS_GPSR2_VAL 0x922ac000 252#define CONFIG_SYS_GPSR3_VAL 0x0161e800 253 254#define CONFIG_SYS_GPCR0_VAL 0x00010000 255#define CONFIG_SYS_GPCR1_VAL 0x0 256#define CONFIG_SYS_GPCR2_VAL 0x0 257#define CONFIG_SYS_GPCR3_VAL 0x0 258 259#define CONFIG_SYS_GPDR0_VAL 0xcbb18800 260#define CONFIG_SYS_GPDR1_VAL 0xfccfa981 261#define CONFIG_SYS_GPDR2_VAL 0x922affff 262#define CONFIG_SYS_GPDR3_VAL 0x0161e904 263 264#define CONFIG_SYS_GAFR0_L_VAL 0x00100000 265#define CONFIG_SYS_GAFR0_U_VAL 0xa5da8510 266#define CONFIG_SYS_GAFR1_L_VAL 0x6992901a 267#define CONFIG_SYS_GAFR1_U_VAL 0xaaa5a0aa 268#define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa 269#define CONFIG_SYS_GAFR2_U_VAL 0x4109a401 270#define CONFIG_SYS_GAFR3_L_VAL 0x54010310 271#define CONFIG_SYS_GAFR3_U_VAL 0x00025401 272 273#define CONFIG_SYS_PSSR_VAL 0x30 274 275/* 276 * Clock settings 277 */ 278#define CONFIG_SYS_CKEN 0x00500240 279#define CONFIG_SYS_CCCR 0x02000290 280 281/* 282 * Memory settings 283 */ 284#define CONFIG_SYS_MSC0_VAL 0x3ffc95fa 285#define CONFIG_SYS_MSC1_VAL 0x02ccf974 286#define CONFIG_SYS_MSC2_VAL 0x00000000 287#define CONFIG_SYS_MDCNFG_VAL 0x8ad30ad3 288#define CONFIG_SYS_MDREFR_VAL 0x201fe01e 289#define CONFIG_SYS_MDMRS_VAL 0x00000000 290#define CONFIG_SYS_FLYCNFG_VAL 0x00000000 291#define CONFIG_SYS_SXCNFG_VAL 0x40044004 292#define CONFIG_SYS_MEM_BUF_IMP 0x0f 293 294/* 295 * PCMCIA and CF Interfaces 296 */ 297#define CONFIG_SYS_MECR_VAL 0x00000001 298#define CONFIG_SYS_MCMEM0_VAL 0x00014307 299#define CONFIG_SYS_MCMEM1_VAL 0x00014307 300#define CONFIG_SYS_MCATT0_VAL 0x0001c787 301#define CONFIG_SYS_MCATT1_VAL 0x0001c787 302#define CONFIG_SYS_MCIO0_VAL 0x0001430f 303#define CONFIG_SYS_MCIO1_VAL 0x0001430f 304 305/* 306 * LCD 307 */ 308#ifdef CONFIG_LCD 309#define CONFIG_VOIPAC_LCD 310#endif 311 312/* 313 * USB 314 */ 315#ifdef CONFIG_CMD_USB 316#define CONFIG_USB_OHCI_NEW 317#define CONFIG_SYS_USB_OHCI_CPU_INIT 318#define CONFIG_SYS_USB_OHCI_BOARD_INIT 319#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 320#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4C000000 321#define CONFIG_SYS_USB_OHCI_SLOT_NAME "vpac270" 322#define CONFIG_USB_STORAGE 323#endif 324 325#endif /* __CONFIG_H */ 326