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28#ifndef _NETDEV_H_
29#define _NETDEV_H_
30
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38
39
40int board_eth_init(bd_t *bis);
41int cpu_eth_init(bd_t *bis);
42
43
44int altera_tse_initialize(u8 dev_num, int mac_base,
45 int sgdma_rx_base, int sgdma_tx_base);
46int ax88180_initialize(bd_t *bis);
47int au1x00_enet_initialize(bd_t*);
48int at91emac_register(bd_t *bis, unsigned long iobase);
49int bfin_EMAC_initialize(bd_t *bis);
50int cs8900_initialize(u8 dev_num, int base_addr);
51int dc21x4x_initialize(bd_t *bis);
52int davinci_emac_initialize(void);
53int designware_initialize(u32 id, ulong base_addr, u32 phy_addr);
54int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr);
55int e1000_initialize(bd_t *bis);
56int eepro100_initialize(bd_t *bis);
57int ep93xx_eth_initialize(u8 dev_num, int base_addr);
58int ethoc_initialize(u8 dev_num, int base_addr);
59int eth_3com_initialize (bd_t * bis);
60int fec_initialize (bd_t *bis);
61int fecmxc_initialize (bd_t *bis);
62int ftmac100_initialize(bd_t *bits);
63int greth_initialize(bd_t *bis);
64void gt6426x_eth_initialize(bd_t *bis);
65int inca_switch_initialize(bd_t *bis);
66int lan91c96_initialize(u8 dev_num, int base_addr);
67int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
68int mcdmafec_initialize(bd_t *bis);
69int mcffec_initialize(bd_t *bis);
70int mpc512x_fec_initialize(bd_t *bis);
71int mpc5xxx_fec_initialize(bd_t *bis);
72int mpc8220_fec_initialize(bd_t *bis);
73int mpc82xx_scc_enet_initialize(bd_t *bis);
74int mvgbe_initialize(bd_t *bis);
75int natsemi_initialize(bd_t *bis);
76int npe_initialize(bd_t *bis);
77int ns8382x_initialize(bd_t *bis);
78int pcnet_initialize(bd_t *bis);
79int plb2800_eth_initialize(bd_t *bis);
80int ppc_4xx_eth_initialize (bd_t *bis);
81int rtl8139_initialize(bd_t *bis);
82int rtl8169_initialize(bd_t *bis);
83int scc_initialize(bd_t *bis);
84int skge_initialize(bd_t *bis);
85int smc911x_initialize(u8 dev_num, int base_addr);
86int smc91111_initialize(u8 dev_num, int base_addr);
87int tsi108_eth_initialize(bd_t *bis);
88int uec_initialize(int index);
89int uec_standard_init(bd_t *bis);
90int uli526x_initialize(bd_t *bis);
91int sh_eth_initialize(bd_t *bis);
92int dm9000_initialize(bd_t *bis);
93
94
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96
97
98static inline int pci_eth_init(bd_t *bis)
99{
100 int num = 0;
101
102#ifdef CONFIG_PCI
103
104#ifdef CONFIG_EEPRO100
105 num += eepro100_initialize(bis);
106#endif
107#ifdef CONFIG_TULIP
108 num += dc21x4x_initialize(bis);
109#endif
110#ifdef CONFIG_E1000
111 num += e1000_initialize(bis);
112#endif
113#ifdef CONFIG_PCNET
114 num += pcnet_initialize(bis);
115#endif
116#ifdef CONFIG_NATSEMI
117 num += natsemi_initialize(bis);
118#endif
119#ifdef CONFIG_NS8382X
120 num += ns8382x_initialize(bis);
121#endif
122#if defined(CONFIG_RTL8139)
123 num += rtl8139_initialize(bis);
124#endif
125#if defined(CONFIG_RTL8169)
126 num += rtl8169_initialize(bis);
127#endif
128#if defined(CONFIG_ULI526X)
129 num += uli526x_initialize(bis);
130#endif
131
132#endif
133 return num;
134}
135
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139
140
141#if defined(CONFIG_MV88E61XX_SWITCH)
142enum mv88e61xx_cfg_vlan {
143 MV88E61XX_VLANCFG_DEFAULT,
144 MV88E61XX_VLANCFG_ROUTER
145};
146
147enum mv88e61xx_cfg_mdip {
148 MV88E61XX_MDIP_NOCHANGE,
149 MV88E61XX_MDIP_REVERSE
150};
151
152enum mv88e61xx_cfg_ledinit {
153 MV88E61XX_LED_INIT_DIS,
154 MV88E61XX_LED_INIT_EN
155};
156
157enum mv88e61xx_cfg_rgmiid {
158 MV88E61XX_RGMII_DELAY_DIS,
159 MV88E61XX_RGMII_DELAY_EN
160};
161
162enum mv88e61xx_cfg_prtstt {
163 MV88E61XX_PORTSTT_DISABLED,
164 MV88E61XX_PORTSTT_BLOCKING,
165 MV88E61XX_PORTSTT_LEARNING,
166 MV88E61XX_PORTSTT_FORWARDING
167};
168
169struct mv88e61xx_config {
170 char *name;
171 enum mv88e61xx_cfg_vlan vlancfg;
172 enum mv88e61xx_cfg_rgmiid rgmii_delay;
173 enum mv88e61xx_cfg_prtstt portstate;
174 enum mv88e61xx_cfg_ledinit led_init;
175 enum mv88e61xx_cfg_mdip mdip;
176 u32 ports_enabled;
177 u8 cpuport;
178};
179
180int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig);
181#endif
182
183#endif
184