1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31#include <common.h>
32#include <watchdog.h>
33#include <command.h>
34#include <stdio_dev.h>
35#include <timestamp.h>
36#include <version.h>
37#include <malloc.h>
38#include <net.h>
39#include <ide.h>
40#include <serial.h>
41#include <asm/u-boot-i386.h>
42#include <elf.h>
43
44#ifdef CONFIG_BITBANGMII
45#include <miiphy.h>
46#endif
47
48DECLARE_GLOBAL_DATA_PTR;
49
50
51extern ulong __text_start;
52extern ulong __data_end;
53extern ulong __rel_dyn_start;
54extern ulong __rel_dyn_end;
55extern ulong __bss_start;
56extern ulong __bss_end;
57
58const char version_string[] =
59 U_BOOT_VERSION" (" U_BOOT_DATE " - " U_BOOT_TIME ")";
60
61
62
63
64
65
66
67
68static int init_baudrate (void)
69{
70 char tmp[64];
71 int i = getenv_f("baudrate", tmp, 64);
72
73 gd->baudrate = (i != 0)
74 ? (int) simple_strtoul (tmp, NULL, 10)
75 : CONFIG_BAUDRATE;
76
77 return (0);
78}
79
80static int display_banner (void)
81{
82
83 printf ("\n\n%s\n\n", version_string);
84
85
86
87
88
89
90
91
92
93
94
95 return (0);
96}
97
98
99
100
101
102
103
104
105static int display_dram_config (void)
106{
107 int i;
108
109 puts ("DRAM Configuration:\n");
110
111 for (i=0; i<CONFIG_NR_DRAM_BANKS; i++) {
112 printf ("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
113 print_size (gd->bd->bi_dram[i].size, "\n");
114 }
115
116 return (0);
117}
118
119static void display_flash_config (ulong size)
120{
121 puts ("Flash: ");
122 print_size (size, "\n");
123}
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149typedef int (init_fnc_t) (void);
150
151init_fnc_t *init_sequence[] = {
152 cpu_init_r,
153 board_early_init_r,
154 dram_init,
155 interrupt_init,
156 timer_init,
157 env_init,
158 init_baudrate,
159 serial_init,
160 display_banner,
161 display_dram_config,
162
163 NULL,
164};
165
166gd_t *gd;
167
168
169
170
171void board_init_f (ulong gdp)
172{
173 void *text_start = &__text_start;
174 void *data_end = &__data_end;
175 void *rel_dyn_start = &__rel_dyn_start;
176 void *rel_dyn_end = &__rel_dyn_end;
177 void *bss_start = &__bss_start;
178 void *bss_end = &__bss_end;
179
180 ulong *dst_addr;
181 ulong *src_addr;
182 ulong *end_addr;
183
184 void *dest_addr;
185 ulong rel_offset;
186 Elf32_Rel *re_src;
187 Elf32_Rel *re_end;
188
189
190 dest_addr = (void *)gdp - (bss_end - text_start);
191 rel_offset = text_start - dest_addr;
192
193
194 if (((gd_t *)gdp)->flags & GD_FLG_COLD_BOOT) {
195
196 if (cpu_init_f() != 0)
197 hang();
198
199
200 if (board_early_init_f() != 0)
201 hang();
202 }
203
204
205 dst_addr = (ulong *)dest_addr;
206 src_addr = (ulong *)(text_start + ((gd_t *)gdp)->load_off);
207 end_addr = (ulong *)(data_end + ((gd_t *)gdp)->load_off);
208
209 while (src_addr < end_addr)
210 *dst_addr++ = *src_addr++;
211
212
213 dst_addr = (ulong *)(bss_start - rel_offset);
214 end_addr = (ulong *)(bss_end - rel_offset);
215
216 while (dst_addr < end_addr)
217 *dst_addr++ = 0x00000000;
218
219
220 re_src = (Elf32_Rel *)(rel_dyn_start + ((gd_t *)gdp)->load_off);
221 re_end = (Elf32_Rel *)(rel_dyn_end + ((gd_t *)gdp)->load_off);
222
223 do {
224 if (re_src->r_offset >= CONFIG_SYS_TEXT_BASE)
225 if (*(Elf32_Addr *)(re_src->r_offset - rel_offset) >= CONFIG_SYS_TEXT_BASE)
226 *(Elf32_Addr *)(re_src->r_offset - rel_offset) -= rel_offset;
227 } while (re_src++ < re_end);
228
229 ((gd_t *)gdp)->reloc_off = rel_offset;
230 ((gd_t *)gdp)->flags |= GD_FLG_RELOC;
231
232
233 (board_init_r - rel_offset)((gd_t *)gdp, (ulong)dest_addr);
234
235
236 while(1);
237}
238
239void board_init_r(gd_t *id, ulong dest_addr)
240{
241 char *s;
242 int i;
243 ulong size;
244 static bd_t bd_data;
245 init_fnc_t **init_fnc_ptr;
246
247 show_boot_progress(0x21);
248
249 gd = id;
250
251 __asm__ __volatile__("": : :"memory");
252
253 gd->bd = &bd_data;
254 memset (gd->bd, 0, sizeof (bd_t));
255 show_boot_progress(0x22);
256
257 gd->baudrate = CONFIG_BAUDRATE;
258
259 mem_malloc_init((((ulong)dest_addr - CONFIG_SYS_MALLOC_LEN)+3)&~3,
260 CONFIG_SYS_MALLOC_LEN);
261
262 for (init_fnc_ptr = init_sequence, i=0; *init_fnc_ptr; ++init_fnc_ptr, i++) {
263 show_boot_progress(0xa130|i);
264
265 if ((*init_fnc_ptr)() != 0) {
266 hang ();
267 }
268 }
269 show_boot_progress(0x23);
270
271#ifdef CONFIG_SERIAL_MULTI
272 serial_initialize();
273#endif
274
275 size = flash_init();
276 display_flash_config(size);
277 show_boot_progress(0x24);
278
279 show_boot_progress(0x25);
280
281
282 env_relocate ();
283 show_boot_progress(0x26);
284
285
286#ifdef CONFIG_CMD_NET
287
288 bd_data.bi_ip_addr = getenv_IPaddr ("ipaddr");
289#endif
290
291#if defined(CONFIG_PCI)
292
293
294
295 pci_init();
296#endif
297
298 show_boot_progress(0x27);
299
300
301 stdio_init ();
302
303 jumptable_init ();
304
305
306 console_init_r();
307
308#ifdef CONFIG_MISC_INIT_R
309
310 misc_init_r();
311#endif
312
313#if defined(CONFIG_CMD_PCMCIA) && !defined(CONFIG_CMD_IDE)
314 WATCHDOG_RESET();
315 puts ("PCMCIA:");
316 pcmcia_init();
317#endif
318
319#if defined(CONFIG_CMD_KGDB)
320 WATCHDOG_RESET();
321 puts("KGDB: ");
322 kgdb_init();
323#endif
324
325
326 enable_interrupts();
327 show_boot_progress(0x28);
328
329#ifdef CONFIG_STATUS_LED
330 status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
331#endif
332
333 udelay(20);
334
335 set_timer (0);
336
337
338 if ((s = getenv ("loadaddr")) != NULL) {
339 load_addr = simple_strtoul (s, NULL, 16);
340 }
341#if defined(CONFIG_CMD_NET)
342 if ((s = getenv ("bootfile")) != NULL) {
343 copy_filename (BootFile, s, sizeof (BootFile));
344 }
345#endif
346
347 WATCHDOG_RESET();
348
349#if defined(CONFIG_CMD_IDE)
350 WATCHDOG_RESET();
351 puts("IDE: ");
352 ide_init();
353#endif
354
355#if defined(CONFIG_CMD_SCSI)
356 WATCHDOG_RESET();
357 puts("SCSI: ");
358 scsi_init();
359#endif
360
361#if defined(CONFIG_CMD_DOC)
362 WATCHDOG_RESET();
363 puts("DOC: ");
364 doc_init();
365#endif
366
367#ifdef CONFIG_BITBANGMII
368 bb_miiphy_init();
369#endif
370#if defined(CONFIG_CMD_NET)
371#if defined(CONFIG_NET_MULTI)
372 WATCHDOG_RESET();
373 puts("Net: ");
374#endif
375 eth_initialize(gd->bd);
376#endif
377
378#if ( defined(CONFIG_CMD_NET)) && (0)
379 WATCHDOG_RESET();
380# ifdef DEBUG
381 puts ("Reset Ethernet PHY\n");
382# endif
383 reset_phy();
384#endif
385
386#ifdef CONFIG_LAST_STAGE_INIT
387 WATCHDOG_RESET();
388
389
390
391
392
393 last_stage_init();
394#endif
395
396
397#ifdef CONFIG_POST
398 post_run (NULL, POST_RAM | post_bootmode_get(0));
399#endif
400
401
402 show_boot_progress(0x29);
403
404
405 for (;;) {
406 main_loop();
407 }
408
409
410}
411
412void hang (void)
413{
414 puts ("### ERROR ### Please RESET the board ###\n");
415 for (;;);
416}
417
418unsigned long do_go_exec (ulong (*entry)(int, char * const []), int argc, char * const argv[])
419{
420 unsigned long ret = 0;
421 char **argv_tmp;
422
423
424
425
426
427
428
429
430 argv_tmp = malloc(sizeof(char *) * (argc + 1));
431
432 if (argv_tmp) {
433 argv_tmp[0] = (char *)gd;
434
435 memcpy(&argv_tmp[1], argv, (size_t)(sizeof(char *) * argc));
436
437 ret = (entry) (argc, &argv_tmp[1]);
438 free(argv_tmp);
439 }
440
441 return ret;
442}
443
444void setup_pcat_compatibility(void)
445 __attribute__((weak, alias("__setup_pcat_compatibility")));
446
447void __setup_pcat_compatibility(void)
448{
449}
450