LXR uboot/board/gdsys/intip/chip

   1/*
   2 * (C) Copyright 2008-2009
   3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4 *
   5 * See file CREDITS for list of people who contributed to this
   6 * project.
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License as
  10 * published by the Free Software Foundation; either version 2 of
  11 * the License, or (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, write to the Free Software
  20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21 * MA 02111-1307 USA
  22 *
  23 */
  24
  25#include <common.h>
  26#include <asm/ppc4xx_config.h>
  27
  28struct ppc4xx_config ppc4xx_config_val[] = {
  29        {
  30                "600-nor", "NOR  CPU: 600 PLB: 200 OPB: 100 EBC: 100",
  31                {
  32                        0x86, 0x80, 0xce, 0x1f, 0x79, 0x80, 0x00, 0xa0,
  33                        0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
  34                }
  35        },
  36        {
  37                "600-nand", "NAND CPU: 600 PLB: 200 OPB: 100 EBC: 100",
  38                {
  39                        0x86, 0x80, 0xce, 0x1f, 0x79, 0x90, 0x01, 0xa0,
  40                        0xa0, 0xe8, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
  41                }
  42        },
  43        {
  44                "800-nor", "NOR  CPU: 800 PLB: 200 OPB: 100 EBC: 100",
  45                {
  46                        0x86, 0x80, 0xba, 0x14, 0x99, 0x80, 0x00, 0xa0,
  47                        0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
  48                }
  49        },
  50        {
  51                "800-nand", "NAND CPU: 800 PLB: 200 OPB: 100 EBC: 100",
  52                {
  53                        0x86, 0x80, 0xba, 0x14, 0x99, 0x90, 0x01, 0xa0,
  54                        0xa0, 0xe8, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
  55                }
  56        },
  57        {
  58                "1000-nor", "NOR  CPU:1000 PLB: 200 OPB: 100 EBC: 100",
  59                {
  60                        0x86, 0x82, 0x96, 0x19, 0xb9, 0x80, 0x00, 0xa0,
  61                        0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
  62                }
  63        },
  64        {
  65                "1000-nand", "NAND CPU:1000 PLB: 200 OPB: 100 EBC: 100",
  66                {
  67                        0x86, 0x82, 0x96, 0x19, 0xb9, 0x90, 0x01, 0xa0,
  68                        0xa0, 0xe8, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
  69                }
  70        },
  71        {
  72                "1066-nor", "NOR  CPU:1066 PLB: 266 OPB:  88 EBC:  88",
  73                {
  74                        0x86, 0x80, 0xb3, 0x01, 0x9d, 0x80, 0x00, 0xa0,
  75                        0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
  76                }
  77        },
  78        {
  79                "1066-nand", "NAND CPU:1066 PLB: 266 OPB:  88 EBC:  88",
  80                {
  81                        0x86, 0x80, 0xb3, 0x01, 0x9d, 0x90, 0x01, 0xa0,
  82                        0xa0, 0xe8, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
  83                }
  84        },
  85};
  86
  87int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);
  88