1/* 2 * Configuation settings for the Freescale MCF52277 EVB board. 3 * 4 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. 5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26/* 27 * board/config.h - configuration options, board specific 28 */ 29 30#ifndef _M52277EVB_H 31#define _M52277EVB_H 32 33/* 34 * High Level Configuration Options 35 * (easy to change) 36 */ 37#define CONFIG_MCF5227x /* define processor family */ 38#define CONFIG_M52277 /* define processor type */ 39#define CONFIG_M52277EVB /* M52277EVB board */ 40 41#define CONFIG_MCFUART 42#define CONFIG_SYS_UART_PORT (0) 43#define CONFIG_BAUDRATE 115200 44#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } 45 46#undef CONFIG_WATCHDOG 47 48#define CONFIG_TIMESTAMP /* Print image info with timestamp */ 49 50/* 51 * BOOTP options 52 */ 53#define CONFIG_BOOTP_BOOTFILESIZE 54#define CONFIG_BOOTP_BOOTPATH 55#define CONFIG_BOOTP_GATEWAY 56#define CONFIG_BOOTP_HOSTNAME 57 58/* Command line configuration */ 59#include <config_cmd_default.h> 60 61#define CONFIG_CMD_CACHE 62#define CONFIG_CMD_DATE 63#define CONFIG_CMD_ELF 64#define CONFIG_CMD_FLASH 65#define CONFIG_CMD_I2C 66#define CONFIG_CMD_JFFS2 67#define CONFIG_CMD_LOADB 68#define CONFIG_CMD_LOADS 69#define CONFIG_CMD_MEMORY 70#define CONFIG_CMD_MISC 71#undef CONFIG_CMD_NET 72#define CONFIG_CMD_REGINFO 73#undef CONFIG_CMD_USB 74#undef CONFIG_CMD_BMP 75#define CONFIG_CMD_SPI 76#define CONFIG_CMD_SF 77 78#define CONFIG_HOSTNAME M52277EVB 79#define CONFIG_SYS_UBOOT_END 0x3FFFF 80#define CONFIG_SYS_LOAD_ADDR2 0x40010007 81#ifdef CONFIG_SYS_STMICRO_BOOT 82/* ST Micro serial flash */ 83#define CONFIG_EXTRA_ENV_SETTINGS \ 84 "inpclk=" MK_STR(CONFIG_SYS_INPUT_CLKSRC) "\0" \ 85 "loadaddr=0x40010000\0" \ 86 "uboot=u-boot.bin\0" \ 87 "load=loadb ${loadaddr} ${baudrate};" \ 88 "loadb " MK_STR(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \ 89 "upd=run load; run prog\0" \ 90 "prog=sf probe 0:2 10000 1;" \ 91 "sf erase 0 30000;" \ 92 "sf write ${loadaddr} 0 30000;" \ 93 "save\0" \ 94 "" 95#endif 96#ifdef CONFIG_SYS_SPANSION_BOOT 97#define CONFIG_EXTRA_ENV_SETTINGS \ 98 "inpclk=" MK_STR(CONFIG_SYS_INPUT_CLKSRC) "\0" \ 99 "loadaddr=0x40010000\0" \ 100 "uboot=u-boot.bin\0" \ 101 "load=loadb ${loadaddr} ${baudrate}\0" \ 102 "upd=run load; run prog\0" \ 103 "prog=prot off " MK_STR(CONFIG_SYS_FLASH_BASE) \ 104 " " MK_STR(CONFIG_SYS_UBOOT_END) ";" \ 105 "era " MK_STR(CONFIG_SYS_FLASH_BASE) " " \ 106 MK_STR(CONFIG_SYS_UBOOT_END) ";" \ 107 "cp.b ${loadaddr} " MK_STR(CONFIG_SYS_FLASH_BASE) \ 108 " ${filesize}; save\0" \ 109 "updsbf=run loadsbf; run progsbf\0" \ 110 "loadsbf=loadb ${loadaddr} ${baudrate};" \ 111 "loadb " MK_STR(CONFIG_SYS_LOAD_ADDR2) " ${baudrate} \0" \ 112 "progsbf=sf probe 0:2 10000 1;" \ 113 "sf erase 0 30000;" \ 114 "sf write ${loadaddr} 0 30000;" \ 115 "" 116#endif 117 118#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ 119/* LCD */ 120#ifdef CONFIG_CMD_BMP 121#define CONFIG_LCD 122#define CONFIG_SPLASH_SCREEN 123#define CONFIG_LCD_LOGO 124#define CONFIG_SHARP_LQ035Q7DH06 125#endif 126 127/* USB */ 128#ifdef CONFIG_CMD_USB 129#define CONFIG_USB_EHCI 130#define CONFIG_USB_STORAGE 131#define CONFIG_DOS_PARTITION 132#define CONFIG_MAC_PARTITION 133#define CONFIG_ISO_PARTITION 134#define CONFIG_SYS_USB_EHCI_REGS_BASE 0xFC0B0000 135#define CONFIG_SYS_USB_EHCI_CPU_INIT 136#endif 137 138/* Realtime clock */ 139#define CONFIG_MCFRTC 140#undef RTC_DEBUG 141#define CONFIG_SYS_RTC_OSCILLATOR (32 * CONFIG_SYS_HZ) 142 143/* Timer */ 144#define CONFIG_MCFTMR 145#undef CONFIG_MCFPIT 146 147/* I2c */ 148#define CONFIG_FSL_I2C 149#define CONFIG_HARD_I2C /* I2C with hardware support */ 150#undef CONFIG_SOFT_I2C /* I2C bit-banged */ 151#define CONFIG_SYS_I2C_SPEED 80000 /* I2C speed and slave address */ 152#define CONFIG_SYS_I2C_SLAVE 0x7F 153#define CONFIG_SYS_I2C_OFFSET 0x58000 154#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 155 156/* DSPI and Serial Flash */ 157#define CONFIG_CF_SPI 158#define CONFIG_CF_DSPI 159#define CONFIG_HARD_SPI 160#define CONFIG_SYS_SBFHDR_SIZE 0x7 161#ifdef CONFIG_CMD_SPI 162# define CONFIG_SYS_DSPI_CS2 163# define CONFIG_SPI_FLASH 164# define CONFIG_SPI_FLASH_STMICRO 165 166# define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \ 167 DSPI_CTAR_PCSSCK_1CLK | \ 168 DSPI_CTAR_PASC(0) | \ 169 DSPI_CTAR_PDT(0) | \ 170 DSPI_CTAR_CSSCK(0) | \ 171 DSPI_CTAR_ASC(0) | \ 172 DSPI_CTAR_DT(1)) 173#endif 174 175/* Input, PCI, Flexbus, and VCO */ 176#define CONFIG_EXTRA_CLOCK 177 178#define CONFIG_SYS_INPUT_CLKSRC 16000000 179 180#define CONFIG_PRAM 2048 /* 2048 KB */ 181 182#define CONFIG_SYS_PROMPT "-> " 183#define CONFIG_SYS_LONGHELP /* undef to save memory */ 184 185#if defined(CONFIG_CMD_KGDB) 186#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 187#else 188#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 189#endif 190#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 191#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 192#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 193 194#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000) 195 196#define CONFIG_SYS_HZ 1000 197 198#define CONFIG_SYS_MBAR 0xFC000000 199 200/* 201 * Low Level Configuration Settings 202 * (address mappings, register initial values, etc.) 203 * You should know what you are doing if you make changes here. 204 */ 205 206/* 207 * Definitions for initial stack pointer and data area (in DPRAM) 208 */ 209#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 210#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* Size of used area in internal SRAM */ 211#define CONFIG_SYS_INIT_RAM_CTRL 0x221 212#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 32) 213#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 32) 214#define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32) 215 216/* 217 * Start addresses for the final memory configuration 218 * (Set up by the startup code) 219 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 220 */ 221#define CONFIG_SYS_SDRAM_BASE 0x40000000 222#define CONFIG_SYS_SDRAM_SIZE 64 /* SDRAM size in MB */ 223#define CONFIG_SYS_SDRAM_CFG1 0x43711630 224#define CONFIG_SYS_SDRAM_CFG2 0x56670000 225#define CONFIG_SYS_SDRAM_CTRL 0xE1092000 226#define CONFIG_SYS_SDRAM_EMOD 0x81810000 227#define CONFIG_SYS_SDRAM_MODE 0x00CD0000 228#define CONFIG_SYS_SDRAM_DRV_STRENGTH 0x00 229 230#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 231#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) 232 233#ifdef CONFIG_CF_SBF 234# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400) 235#else 236# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 237#endif 238#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 239#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ 240#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ 241 242/* Initial Memory map for Linux */ 243#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) 244#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20) 245 246/* 247 * Configuration for environment 248 * Environment is embedded in u-boot in the second sector of the flash 249 */ 250#ifdef CONFIG_CF_SBF 251# define CONFIG_ENV_IS_IN_SPI_FLASH 252# define CONFIG_ENV_SPI_CS 2 253#else 254# define CONFIG_ENV_IS_IN_FLASH 1 255#endif 256#define CONFIG_ENV_OVERWRITE 1 257 258/*----------------------------------------------------------------------- 259 * FLASH organization 260 */ 261#ifdef CONFIG_SYS_STMICRO_BOOT 262# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE 263# define CONFIG_ENV_OFFSET 0x30000 264# define CONFIG_ENV_SIZE 0x1000 265# define CONFIG_ENV_SECT_SIZE 0x10000 266#endif 267#ifdef CONFIG_SYS_SPANSION_BOOT 268# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE 269# define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE 270# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x8000) 271# define CONFIG_ENV_SIZE 0x1000 272# define CONFIG_ENV_SECT_SIZE 0x8000 273#endif 274 275#define CONFIG_SYS_FLASH_CFI 276#ifdef CONFIG_SYS_FLASH_CFI 277# define CONFIG_FLASH_CFI_DRIVER 1 278# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 279# define CONFIG_FLASH_SPANSION_S29WS_N 1 280# define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ 281# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 282# define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 283# define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ 284# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ 285# define CONFIG_SYS_FLASH_CHECKSUM 286# define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE } 287#endif 288 289/* 290 * This is setting for JFFS2 support in u-boot. 291 * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support. 292 */ 293#ifdef CONFIG_CMD_JFFS2 294# define CONFIG_JFFS2_DEV "nor0" 295# define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x40000) 296# define CONFIG_JFFS2_PART_OFFSET (CONFIG_SYS_FLASH0_BASE + 0x40000) 297#endif 298 299/*----------------------------------------------------------------------- 300 * Cache Configuration 301 */ 302#define CONFIG_SYS_CACHELINE_SIZE 16 303 304#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 305 CONFIG_SYS_INIT_RAM_SIZE - 8) 306#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 307 CONFIG_SYS_INIT_RAM_SIZE - 4) 308#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) 309#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 310 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 311 CF_ACR_EN | CF_ACR_SM_ALL) 312#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ 313 CF_CACR_DISD | CF_CACR_INVI | \ 314 CF_CACR_CEIB | CF_CACR_DCM | \ 315 CF_CACR_EUSP) 316 317/*----------------------------------------------------------------------- 318 * Memory bank definitions 319 */ 320/* 321 * CS0 - NOR Flash 322 * CS1 - Available 323 * CS2 - Available 324 * CS3 - Available 325 * CS4 - Available 326 * CS5 - Available 327 */ 328 329#ifdef CONFIG_CF_SBF 330#define CONFIG_SYS_CS0_BASE 0x04000000 331#define CONFIG_SYS_CS0_MASK 0x00FF0001 332#define CONFIG_SYS_CS0_CTRL 0x00001FA0 333#else 334#define CONFIG_SYS_CS0_BASE 0x00000000 335#define CONFIG_SYS_CS0_MASK 0x00FF0001 336#define CONFIG_SYS_CS0_CTRL 0x00001FA0 337#endif 338 339#endif /* _M52277EVB_H */ 340