LXR uboot/include/configs/cpuat91.h

   1/*
   2 * CPUAT91 by (C) Copyright 2006-2010 Eric Benard
   3 * eric@eukrea.com
   4 *
   5 * Configuration settings for the CPUAT91 board.
   6 *
   7 * See file CREDITS for list of people who contributed to this
   8 * project.
   9 *
  10 * This program is free software; you can redistribute it and/or
  11 * modify it under the terms of the GNU General Public License as
  12 * published by the Free Software Foundation; either version 2 of
  13 * the License, or (at your option) any later version.
  14 *
  15 * This program is distributed in the hope that it will be useful,
  16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 * GNU General Public License for more details.
  19 *
  20 * You should have received a copy of the GNU General Public License
  21 * along with this program; if not, write to the Free Software
  22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23 * MA 02111-1307 USA
  24 */
  25
  26#ifndef _CONFIG_CPUAT91_H
  27#define _CONFIG_CPUAT91_H
  28
  29#ifdef CONFIG_CPUAT91_RAM
  30#define CONFIG_SKIP_LOWLEVEL_INIT       1
  31#else
  32#define CONFIG_BOOTDELAY                1
  33#endif
  34
  35#define AT91C_MAIN_CLOCK                179712000
  36#define AT91C_MASTER_CLOCK              59904000
  37
  38#define AT91_SLOW_CLOCK                 32768
  39
  40#define CONFIG_ARM920T                  1
  41#define CONFIG_AT91RM9200               1
  42#define CONFIG_CPUAT91                  1
  43
  44#undef CONFIG_USE_IRQ
  45#define USE_920T_MMU                    1
  46
  47#define CONFIG_CMDLINE_TAG              1
  48#define CONFIG_SETUP_MEMORY_TAGS        1
  49#define CONFIG_INITRD_TAG               1
  50
  51#ifndef CONFIG_SKIP_LOWLEVEL_INIT
  52#define CONFIG_SYS_USE_MAIN_OSCILLATOR  1
  53/* flash */
  54#define CONFIG_SYS_MC_PUIA_VAL  0x00000000
  55#define CONFIG_SYS_MC_PUP_VAL   0x00000000
  56#define CONFIG_SYS_MC_PUER_VAL  0x00000000
  57#define CONFIG_SYS_MC_ASR_VAL   0x00000000
  58#define CONFIG_SYS_MC_AASR_VAL  0x00000000
  59#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
  60#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
  61
  62/* clocks */
  63#define CONFIG_SYS_PLLAR_VAL    0x20263E04 /* 179.712000 MHz for PCK */
  64#define CONFIG_SYS_PLLBR_VAL    0x10483E0E /* 48.054857 MHz for USB */
  65#define CONFIG_SYS_MCKR_VAL     0x00000202 /* PCK/3 = MCK Master Clock */
  66
  67/* sdram */
  68#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as D16/D31 */
  69#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000
  70#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000
  71#define CONFIG_SYS_EBI_CSA_VAL  0x00000002 /* CS1=SDRAM */
  72#define CONFIG_SYS_SDRC_CR_VAL  0x2188C155 /* set up the SDRAM */
  73#define CONFIG_SYS_SDRAM        0x20000000 /* address of the SDRAM */
  74#define CONFIG_SYS_SDRAM1       0x20000080 /* address of the SDRAM */
  75#define CONFIG_SYS_SDRAM_VAL    0x00000000 /* value written to SDRAM */
  76#define CONFIG_SYS_SDRC_MR_VAL  0x00000002 /* Precharge All */
  77#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */
  78#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
  79#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
  80#define CONFIG_SYS_SDRC_TR_VAL  0x000002E0 /* Write refresh rate */
  81#endif  /* CONFIG_SKIP_LOWLEVEL_INIT */
  82
  83/* define one of these to choose the DBGU, USART0 or USART1 as console */
  84#define CONFIG_AT91RM9200_USART         1
  85#define CONFIG_DBGU                     1
  86#undef CONFIG_USART0
  87#undef CONFIG_USART1
  88
  89#undef CONFIG_HARD_I2C
  90#define CONFIG_SOFT_I2C                 1
  91#define AT91_PIN_SDA                    (1<<25)
  92#define AT91_PIN_SCL                    (1<<26)
  93
  94#define CONFIG_SYS_I2C_INIT_BOARD       1
  95#define CONFIG_SYS_I2C_SPEED            50000
  96#define CONFIG_SYS_I2C_SLAVE            0
  97
  98#define I2C_INIT        i2c_init_board();
  99#define I2C_ACTIVE      writel(AT91_PMX_AA_TWD, &pio->pioa.mddr);
 100#define I2C_TRISTATE    writel(AT91_PMX_AA_TWD, &pio->pioa.mder);
 101#define I2C_READ        ((readl(&pio->pioa.pdsr) & AT91_PMX_AA_TWD) != 0)
 102#define I2C_SDA(bit)                                            \
 103        if (bit)                                                \
 104                writel(AT91_PMX_AA_TWD, &pio->pioa.sodr);       \
 105        else                                                    \
 106                writel(AT91_PMX_AA_TWD, &pio->pioa.codr);
 107#define I2C_SCL(bit)                                            \
 108        if (bit)                                                \
 109                writel(AT91_PMX_AA_TWCK, &pio->pioa.sodr);      \
 110        else                                                    \
 111                writel(AT91_PMX_AA_TWCK, &pio->pioa.codr);
 112
 113#define I2C_DELAY       udelay(2500000/CONFIG_SYS_I2C_SPEED)
 114
 115#define CONFIG_SYS_I2C_EEPROM_ADDR              0x54
 116#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
 117#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW     1
 118#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10
 119
 120#define CONFIG_BOOTP_BOOTFILESIZE       1
 121#define CONFIG_BOOTP_BOOTPATH           1
 122#define CONFIG_BOOTP_GATEWAY            1
 123#define CONFIG_BOOTP_HOSTNAME           1
 124
 125#include <config_cmd_default.h>
 126
 127#define CONFIG_CMD_DHCP                 1
 128#define CONFIG_CMD_PING                 1
 129#define CONFIG_CMD_MII                  1
 130#define CONFIG_CMD_CACHE                1
 131#undef CONFIG_CMD_USB
 132#undef CONFIG_CMD_FPGA
 133#undef CONFIG_CMD_IMI
 134#undef CONFIG_CMD_LOADS
 135#undef CONFIG_CMD_NFS
 136
 137#define CONFIG_CMD_EEPROM               1
 138#define CONFIG_CMD_I2C                  1
 139
 140#define CONFIG_NR_DRAM_BANKS                    1
 141#define PHYS_SDRAM                              0x20000000
 142#define PHYS_SDRAM_SIZE                         0x02000000
 143
 144#define CONFIG_SYS_MEMTEST_START                PHYS_SDRAM
 145#define CONFIG_SYS_MEMTEST_END                  \
 146        (CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 512 * 1024)
 147
 148#define CONFIG_NET_MULTI                1
 149#define CONFIG_DRIVER_AT91EMAC          1
 150#define CONFIG_SYS_RX_ETH_BUFFER        8
 151#define CONFIG_RMII                     1
 152#define CONFIG_MII                      1
 153#define CONFIG_DRIVER_AT91EMAC_PHYADDR  1
 154#define CONFIG_NET_RETRY_COUNT                  20
 155#define CONFIG_KS8721_PHY                       1
 156
 157#define CONFIG_SYS_FLASH_CFI                    1
 158#define CONFIG_FLASH_CFI_DRIVER                 1
 159#define CONFIG_SYS_FLASH_EMPTY_INFO             1
 160#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       1
 161#define CONFIG_SYS_MAX_FLASH_BANKS              1
 162#define CONFIG_SYS_FLASH_PROTECTION             1
 163#define PHYS_FLASH_1                            0x10000000
 164#define CONFIG_SYS_FLASH_BASE                   PHYS_FLASH_1
 165#define CONFIG_SYS_MAX_FLASH_SECT               128
 166#define CONFIG_SYS_FLASH_CFI_WIDTH              FLASH_CFI_16BIT
 167
 168#if defined(CONFIG_CMD_USB)
 169#define CONFIG_USB_OHCI_NEW                     1
 170#define CONFIG_USB_STORAGE                      1
 171#define CONFIG_DOS_PARTITION                    1
 172#define CONFIG_AT91C_PQFP_UHPBU                 1
 173#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
 174#define CONFIG_SYS_USB_OHCI_CPU_INIT            1
 175#define CONFIG_SYS_USB_OHCI_REGS_BASE           AT91_USB_HOST_BASE
 176#define CONFIG_SYS_USB_OHCI_SLOT_NAME           "at91rm9200"
 177#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      15
 178#endif
 179
 180#define CONFIG_ENV_IS_IN_FLASH          1
 181#define CONFIG_ENV_ADDR                 (PHYS_FLASH_1 + 0x20000)
 182#define CONFIG_ENV_SIZE                 0x20000
 183#define CONFIG_ENV_SECT_SIZE            0x20000
 184
 185#define CONFIG_SYS_LOAD_ADDR            0x21000000
 186
 187#define CONFIG_BAUDRATE                 115200
 188#define CONFIG_SYS_BAUDRATE_TABLE       { 115200, 57600, 38400, 19200, 9600 }
 189
 190#define CONFIG_SYS_PROMPT               "CPUAT91=> "
 191#define CONFIG_SYS_CBSIZE               256
 192#define CONFIG_SYS_MAXARGS              32
 193#define CONFIG_SYS_PBSIZE               \
 194        (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 195#define CONFIG_CMDLINE_EDITING          1
 196#define CONFIG_SYS_LONGHELP             1
 197
 198#define CONFIG_SYS_HZ                   1000
 199#define CONFIG_SYS_HZ_CLOCK             (AT91C_MASTER_CLOCK / 2)
 200
 201#define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 128 * 1024)
 202#define CONFIG_STACKSIZE                (32 * 1024)
 203
 204#if defined(CONFIG_USE_IRQ)
 205#error CONFIG_USE_IRQ not supported
 206#endif
 207
 208#define CONFIG_DEVICE_NULLDEV           1
 209#define CONFIG_SILENT_CONSOLE           1
 210
 211#define CONFIG_AUTOBOOT_KEYED           1
 212#define CONFIG_AUTOBOOT_PROMPT          \
 213        "Press SPACE to abort autoboot\n"
 214#define CONFIG_AUTOBOOT_STOP_STR        " "
 215#define CONFIG_AUTOBOOT_DELAY_STR       "d"
 216
 217#define CONFIG_VERSION_VARIABLE         1
 218
 219#define MTDIDS_DEFAULT                  "nor0=physmap-flash.0"
 220#define MTDPARTS_DEFAULT                \
 221        "mtdparts=physmap-flash.0:"     \
 222                "128k(u-boot)ro,"       \
 223                "128k(u-boot-env),"     \
 224                "1792k(kernel),"        \
 225                "-(rootfs)"
 226
 227#define CONFIG_BOOTARGS                 \
 228        "root=/dev/mtdblock3 rootfstype=jffs2 console=ttyS0,115200"
 229
 230#define CONFIG_BOOTCOMMAND              "run flashboot"
 231
 232#define CONFIG_EXTRA_ENV_SETTINGS                                       \
 233        "mtdid=" MTDIDS_DEFAULT "\0"                                    \
 234        "mtdparts=" MTDPARTS_DEFAULT "\0"                               \
 235        "flub=tftp 21000000 cpuat91/u-boot.bin; protect off 10000000 "  \
 236                "1001FFFF; erase 10000000 1001FFFF; cp.b 21000000 "     \
 237                "10000000 ${filesize}\0"                                \
 238        "flui=tftp 21000000 cpuat91/uImage; protect off 10040000 "      \
 239                "1019ffff; erase 10040000 101fffff; cp.b 21000000 "     \
 240                "10040000 ${filesize}\0"                                \
 241        "flrfs=tftp 21000000 cpuat91/rootfs.jffs2; protect off "        \
 242                "10200000 10ffffff; erase 10200000 10ffffff; cp.b "     \
 243                "21000000 10200000 ${filesize}\0"                       \
 244        "ramargs=setenv bootargs $(bootargs) $(mtdparts)\0"             \
 245        "flashboot=run ramargs;bootm 10040000\0"                        \
 246        "netboot=run ramargs;tftpboot 21000000 cpuat91/uImage;"         \
 247                "bootm 21000000\0"
 248#endif  /* _CONFIG_CPUAT91_H */
 249