1/* 2 * Copyright (C) 2009 David Brownell 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License as 6 * published by the Free Software Foundation; either version 2 of 7 * the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 17 * MA 02111-1307 USA 18 */ 19 20#ifndef __CONFIG_H 21#define __CONFIG_H 22 23/* Spectrum Digital TMS320DM355 EVM board */ 24#define DAVINCI_DM355EVM 25 26#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */ 27#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */ 28#define CONFIG_SYS_CONSOLE_INFO_QUIET 29#define CONFIG_DISPLAY_CPUINFO 30 31/* SoC Configuration */ 32#define CONFIG_ARM926EJS /* arm926ejs CPU */ 33#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ 34#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */ 35#define CONFIG_SYS_HZ 1000 36#define CONFIG_SOC_DM355 37 38/* Memory Info */ 39#define CONFIG_NR_DRAM_BANKS 1 40#define PHYS_SDRAM_1 0x80000000 41#define PHYS_SDRAM_1_SIZE (128 << 20) /* 128 MiB */ 42 43/* Serial Driver info: UART0 for console */ 44#define CONFIG_SYS_NS16550 45#define CONFIG_SYS_NS16550_SERIAL 46#define CONFIG_SYS_NS16550_REG_SIZE -4 47#define CONFIG_SYS_NS16550_COM1 0x01c20000 48#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK 49#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 50#define CONFIG_CONS_INDEX 1 51#define CONFIG_BAUDRATE 115200 52 53/* Ethernet: external DM9000 */ 54#define CONFIG_DRIVER_DM9000 1 55#define CONFIG_DM9000_BASE 0x04014000 56#define DM9000_IO CONFIG_DM9000_BASE 57#define DM9000_DATA (CONFIG_DM9000_BASE + 2) 58#define CONFIG_NET_MULTI 59 60/* I2C */ 61#define CONFIG_HARD_I2C 62#define CONFIG_DRIVER_DAVINCI_I2C 63#define CONFIG_SYS_I2C_SPEED 400000 64#define CONFIG_SYS_I2C_SLAVE 0x10 /* SMBus host address */ 65 66/* NAND: socketed, two chipselects, normally 2 GBytes */ 67#define CONFIG_NAND_DAVINCI 68#define CONFIG_SYS_NAND_CS 2 69#define CONFIG_SYS_NAND_USE_FLASH_BBT 70#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST 71#define CONFIG_SYS_NAND_PAGE_2K 72 73#define CONFIG_SYS_NAND_LARGEPAGE 74#define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, } 75/* socket has two chipselects, nCE0 gated by address BIT(14) */ 76#define CONFIG_SYS_MAX_NAND_DEVICE 1 77#define CONFIG_SYS_NAND_MAX_CHIPS 2 78 79/* USB: OTG connector */ 80/* NYET -- #define CONFIG_USB_DAVINCI */ 81 82/* U-Boot command configuration */ 83#include <config_cmd_default.h> 84 85#undef CONFIG_CMD_BDI 86#undef CONFIG_CMD_FLASH 87#undef CONFIG_CMD_FPGA 88#undef CONFIG_CMD_SETGETDCR 89 90#define CONFIG_CMD_ASKENV 91#define CONFIG_CMD_DHCP 92#define CONFIG_CMD_I2C 93#define CONFIG_CMD_PING 94#define CONFIG_CMD_SAVES 95 96#ifdef CONFIG_NAND_DAVINCI 97#define CONFIG_CMD_MTDPARTS 98#define CONFIG_MTD_PARTITIONS 99#define CONFIG_MTD_DEVICE 100#define CONFIG_CMD_NAND 101#define CONFIG_CMD_UBI 102#define CONFIG_RBTREE 103#endif 104 105#ifdef CONFIG_USB_DAVINCI 106#define CONFIG_MUSB_HCD 107#define CONFIG_CMD_USB 108#define CONFIG_USB_STORAGE 109#else 110#undef CONFIG_MUSB_HCD 111#undef CONFIG_CMD_USB 112#undef CONFIG_USB_STORAGE 113#endif 114 115#define CONFIG_CRC32_VERIFY 116#define CONFIG_MX_CYCLIC 117 118/* U-Boot general configuration */ 119#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ 120#define CONFIG_BOOTFILE "uImage" /* Boot file name */ 121#define CONFIG_SYS_PROMPT "DM355 EVM # " /* Monitor Command Prompt */ 122#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 123#define CONFIG_SYS_PBSIZE /* Print buffer size */ \ 124 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 125#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 126#define CONFIG_SYS_HUSH_PARSER 127#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 128#define CONFIG_SYS_LONGHELP 129 130#ifdef CONFIG_NAND_DAVINCI 131#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */ 132#define CONFIG_ENV_IS_IN_NAND 133#define CONFIG_ENV_OFFSET 0x3C0000 134#undef CONFIG_ENV_IS_IN_FLASH 135#endif 136 137#define CONFIG_BOOTDELAY 5 138#define CONFIG_BOOTCOMMAND \ 139 "dhcp;bootm" 140#define CONFIG_BOOTARGS \ 141 "console=ttyS0,115200n8 " \ 142 "root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro" 143 144#define CONFIG_CMDLINE_EDITING 145#define CONFIG_VERSION_VARIABLE 146#define CONFIG_TIMESTAMP 147 148#define CONFIG_NET_RETRY_COUNT 10 149 150/* U-Boot memory configuration */ 151#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ 152#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */ 153#define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */ 154#define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */ 155 156/* Linux interfacing */ 157#define CONFIG_CMDLINE_TAG 158#define CONFIG_SETUP_MEMORY_TAGS 159#define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */ 160#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */ 161 162 163/* NAND configuration ... socketed with two chipselects. It normally comes 164 * with a 2GByte SLC part with 2KB pages (and 128KB erase blocks); other 165 * 2GByte parts may have 4KB pages, 256KB erase blocks, and use MLC. (MLC 166 * pretty much demands the 4-bit ECC support.) You can of course swap in 167 * other parts, including small page ones. 168 * 169 * This presents a single read-only partition for all bootloader stuff. 170 * UBL (1+ block), U-Boot (256KB+), U-Boot environment (one block), and 171 * some extra space to help cope with bad blocks in that data. Linux 172 * shouldn't care about its detailed layout, and will probably want to use 173 * UBI/UBFS for the rest (except maybe on smallpage chips). It's easy to 174 * override this default partitioning using MTDPARTS and cmdlinepart. 175 */ 176#define MTDIDS_DEFAULT "nand0=davinci_nand.0" 177 178#ifdef CONFIG_SYS_NAND_LARGEPAGE 179/* Use same layout for 128K/256K blocks; allow some bad blocks */ 180#define PART_BOOT "2m(bootloader)ro," 181#else 182/* Assume 16K erase blocks; allow a few bad ones. */ 183#define PART_BOOT "512k(bootloader)ro," 184#endif 185 186#define PART_KERNEL "4m(kernel)," /* kernel + initramfs */ 187#define PART_REST "-(filesystem)" 188 189#define MTDPARTS_DEFAULT \ 190 "mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST 191 192#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */ 193 194#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 195#define CONFIG_SYS_INIT_SP_ADDR \ 196 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) 197 198#endif /* __CONFIG_H */ 199