1/* 2 * (C) Copyright 2002 3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 4 * Marius Groeger <mgroeger@sysgo.de> 5 * 6 * Configuation settings for the LART board. 7 * 8 * See file CREDITS for list of people who contributed to this 9 * project. 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; either version 2 of 14 * the License, or (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24 * MA 02111-1307 USA 25 */ 26 27#ifndef __CONFIG_H 28#define __CONFIG_H 29 30/* 31 * High Level Configuration Options 32 * (easy to change) 33 */ 34#define CONFIG_SA1100 1 /* This is an SA1100 CPU */ 35#define CONFIG_LART 1 /* on an LART Board */ 36 37#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ 38/* we will never enable dcache, because we have to setup MMU first */ 39#define CONFIG_SYS_NO_DCACHE 40 41/* 42 * Size of malloc() pool 43 */ 44#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) 45 46/* 47 * Hardware drivers 48 */ 49#define CONFIG_NET_MULTI 50#define CONFIG_CS8900 /* we have a CS8900 on-board */ 51#define CONFIG_CS8900_BASE 0x20008300 52#define CONFIG_CS8900_BUS16 53 54/* 55 * select serial console configuration 56 */ 57#define CONFIG_SA1100_SERIAL 58#define CONFIG_SERIAL3 1 /* we use SERIAL 3 on LART */ 59 60/* allow to overwrite serial and ethaddr */ 61#define CONFIG_ENV_OVERWRITE 62 63#define CONFIG_BAUDRATE 9600 64 65 66/* 67 * BOOTP options 68 */ 69#define CONFIG_BOOTP_BOOTFILESIZE 70#define CONFIG_BOOTP_BOOTPATH 71#define CONFIG_BOOTP_GATEWAY 72#define CONFIG_BOOTP_HOSTNAME 73 74 75/* 76 * Command line configuration. 77 */ 78#include <config_cmd_default.h> 79 80 81#define CONFIG_BOOTDELAY 3 82#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" 83#define CONFIG_ETHADDR 08:00:3e:26:0a:5b 84#define CONFIG_NETMASK 255.255.0.0 85#define CONFIG_IPADDR 172.22.2.131 86#define CONFIG_SERVERIP 172.22.2.126 87#define CONFIG_BOOTFILE "elinos-lart" 88#define CONFIG_BOOTCOMMAND "tftp; bootm" 89 90#if defined(CONFIG_CMD_KGDB) 91#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ 92#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ 93#endif 94 95/* 96 * Miscellaneous configurable options 97 */ 98#define CONFIG_SYS_LONGHELP /* undef to save memory */ 99#define CONFIG_SYS_PROMPT "LART # " /* Monitor Command Prompt */ 100#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 101#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 102#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 103#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 104 105#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ 106#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ 107 108#define CONFIG_SYS_LOAD_ADDR 0xc8000000 /* default load address */ 109 110#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ 111#define CONFIG_SYS_CPUSPEED 0x0b /* set core clock to 220 MHz */ 112 113 /* valid baudrates */ 114#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 115 116/*----------------------------------------------------------------------- 117 * Stack sizes 118 * 119 * The stack sizes are set up in start.S using the settings below 120 */ 121#define CONFIG_STACKSIZE (128*1024) /* regular stack */ 122#ifdef CONFIG_USE_IRQ 123#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ 124#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ 125#endif 126 127/*----------------------------------------------------------------------- 128 * Physical Memory Map 129 */ 130#define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */ 131#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */ 132#define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */ 133#define PHYS_SDRAM_2 0xc1000000 /* SDRAM Bank #2 */ 134#define PHYS_SDRAM_2_SIZE 0x00800000 /* 8 MB */ 135#define PHYS_SDRAM_3 0xc8000000 /* SDRAM Bank #3 */ 136#define PHYS_SDRAM_3_SIZE 0x00800000 /* 8 MB */ 137#define PHYS_SDRAM_4 0xc9000000 /* SDRAM Bank #4 */ 138#define PHYS_SDRAM_4_SIZE 0x00800000 /* 8 MB */ 139 140 141#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ 142#define PHYS_FLASH_SIZE 0x00400000 /* 4 MB */ 143 144#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 145 146/*----------------------------------------------------------------------- 147 * FLASH and environment organization 148 */ 149#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 150#define CONFIG_SYS_MAX_FLASH_SECT (31+8) /* max number of sectors on one chip */ 151 152/* timeout values are in ticks */ 153#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ 154#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ 155 156#define CONFIG_ENV_IS_IN_FLASH 1 157#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */ 158#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ 159 160#endif /* __CONFIG_H */ 161