1/* 2 * (C) Copyright 2003 3 * Texas Instruments. 4 * Kshitij Gupta <kshitij@ti.com> 5 * Configuation settings for the TI OMAP Innovator board. 6 * 7 * (C) Copyright 2004 8 * ARM Ltd. 9 * Philippe Robin, <philippe.robin@arm.com> 10 * Configuration for Versatile PB. 11 * 12 * See file CREDITS for list of people who contributed to this 13 * project. 14 * 15 * This program is free software; you can redistribute it and/or 16 * modify it under the terms of the GNU General Public License as 17 * published by the Free Software Foundation; either version 2 of 18 * the License, or (at your option) any later version. 19 * 20 * This program is distributed in the hope that it will be useful, 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License 26 * along with this program; if not, write to the Free Software 27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 28 * MA 02111-1307 USA 29 */ 30 31#ifndef __CONFIG_H 32#define __CONFIG_H 33 34/* 35 * High Level Configuration Options 36 * (easy to change) 37 */ 38#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */ 39#define CONFIG_VERSATILE 1 /* in Versatile Platform Board */ 40#define CONFIG_ARCH_VERSATILE 1 /* Specifically, a Versatile */ 41 42#ifndef CONFIG_ARCH_VERSATILE_AB /* AB */ 43#define CONFIG_ARCH_VERSATILE_PB /* Versatile PB is default */ 44#endif 45 46#define CONFIG_SYS_MEMTEST_START 0x100000 47#define CONFIG_SYS_MEMTEST_END 0x10000000 48#define CONFIG_SYS_HZ (1000000 / 256) 49#define CONFIG_SYS_TIMERBASE 0x101E2000 /* Timer 0 and 1 base */ 50 51#define CONFIG_SYS_TIMER_INTERVAL 10000 52#define CONFIG_SYS_TIMER_RELOAD (CONFIG_SYS_TIMER_INTERVAL >> 4) 53#define CONFIG_SYS_TIMER_CTRL 0x84 /* Enable, Clock / 16 */ 54 55/* 56 * control registers 57 */ 58#define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */ 59 60/* 61 * System controller bit assignment 62 */ 63#define VERSATILE_REFCLK 0 64#define VERSATILE_TIMCLK 1 65 66#define VERSATILE_TIMER1_EnSel 15 67#define VERSATILE_TIMER2_EnSel 17 68#define VERSATILE_TIMER3_EnSel 19 69#define VERSATILE_TIMER4_EnSel 21 70 71#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 72#define CONFIG_SETUP_MEMORY_TAGS 1 73#define CONFIG_MISC_INIT_R 1 74/* 75 * Size of malloc() pool 76 */ 77#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) 78/* size in bytes reserved for initial data */ 79 80/* 81 * Hardware drivers 82 */ 83 84#define CONFIG_NET_MULTI 85#define CONFIG_SMC91111 86#define CONFIG_SMC_USE_32_BIT 87#define CONFIG_SMC91111_BASE 0x10010000 88#undef CONFIG_SMC91111_EXT_PHY 89 90/* 91 * NS16550 Configuration 92 */ 93#define CONFIG_PL011_SERIAL 94#define CONFIG_PL011_CLOCK 24000000 95#define CONFIG_PL01x_PORTS \ 96 {(void *)CONFIG_SYS_SERIAL0, \ 97 (void *)CONFIG_SYS_SERIAL1 } 98#define CONFIG_CONS_INDEX 0 99 100#define CONFIG_BAUDRATE 38400 101#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 102#define CONFIG_SYS_SERIAL0 0x101F1000 103#define CONFIG_SYS_SERIAL1 0x101F2000 104 105/* 106 * Command line configuration. 107 */ 108#define CONFIG_CMD_BDI 109#define CONFIG_CMD_DHCP 110#define CONFIG_CMD_FLASH 111#define CONFIG_CMD_IMI 112#define CONFIG_CMD_MEMORY 113#define CONFIG_CMD_NET 114#define CONFIG_CMD_PING 115#define CONFIG_CMD_SAVEENV 116 117/* 118 * BOOTP options 119 */ 120#define CONFIG_BOOTP_BOOTPATH 121#define CONFIG_BOOTP_GATEWAY 122#define CONFIG_BOOTP_HOSTNAME 123#define CONFIG_BOOTP_SUBNETMASK 124 125#define CONFIG_BOOTDELAY 2 126#define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp "\ 127 "netdev=25,0,0xf1010000,0xf1010010,eth0" 128 129/* 130 * Static configuration when assigning fixed address 131 */ 132#define CONFIG_BOOTFILE "/tftpboot/uImage" /* file to load */ 133 134/* 135 * Miscellaneous configurable options 136 */ 137#define CONFIG_SYS_LONGHELP /* undef to save memory */ 138#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 139/* Monitor Command Prompt */ 140#ifdef CONFIG_ARCH_VERSATILE_AB 141# define CONFIG_SYS_PROMPT "VersatileAB # " 142#else 143# define CONFIG_SYS_PROMPT "VersatilePB # " 144#endif 145/* Print Buffer Size */ 146#define CONFIG_SYS_PBSIZE \ 147 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 148#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 149#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 150 151#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */ 152 153/*----------------------------------------------------------------------- 154 * Stack sizes 155 * 156 * The stack sizes are set up in start.S using the settings below 157 */ 158#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ 159#ifdef CONFIG_USE_IRQ 160#define CONFIG_STACKSIZE_IRQ (4 * 1024) /* IRQ stack */ 161#define CONFIG_STACKSIZE_FIQ (4 * 1024) /* FIQ stack */ 162#endif 163 164/*----------------------------------------------------------------------- 165 * Physical Memory Map 166 */ 167#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ 168#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ 169#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ 170#define PHYS_FLASH_SIZE 0x04000000 /* 64MB */ 171 172/*----------------------------------------------------------------------- 173 * FLASH and environment organization 174 */ 175/* 176 * Use the CFI flash driver for ease of use 177 */ 178#define CONFIG_SYS_FLASH_CFI 179#define CONFIG_FLASH_CFI_DRIVER 180#define CONFIG_ENV_IS_IN_FLASH 1 181/* 182 * System control register 183 */ 184#define VERSATILE_SYS_BASE 0x10000000 185#define VERSATILE_SYS_FLASH_OFFSET 0x4C 186#define VERSATILE_FLASHCTRL \ 187 (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET) 188/* Enable writing to flash */ 189#define VERSATILE_FLASHPROG_FLVPPEN (1 << 0) 190 191/* timeout values are in ticks */ 192#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */ 193#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */ 194 195/* 196 * Note that CONFIG_SYS_MAX_FLASH_SECT allows for a parameter block 197 * i.e. 198 * the bottom "sector" (bottom boot), or top "sector" 199 * (top boot), is a seperate erase region divided into 200 * 4 (equal) smaller sectors. This, notionally, allows 201 * quicker erase/rewrire of the most frequently changed 202 * area...... 203 * CONFIG_SYS_MAX_FLASH_SECT is padded up to a multiple of 4 204 */ 205 206#ifdef CONFIG_ARCH_VERSATILE_AB 207#define FLASH_SECTOR_SIZE 0x00020000 /* 128 KB sectors */ 208#define CONFIG_ENV_SECT_SIZE (2 * FLASH_SECTOR_SIZE) 209#define CONFIG_SYS_MAX_FLASH_SECT (520) 210#endif 211 212#ifdef CONFIG_ARCH_VERSATILE_PB /* Versatile PB is default */ 213#define FLASH_SECTOR_SIZE 0x00040000 /* 256 KB sectors */ 214#define CONFIG_ENV_SECT_SIZE FLASH_SECTOR_SIZE 215#define CONFIG_SYS_MAX_FLASH_SECT (260) 216#endif 217 218#define CONFIG_SYS_FLASH_BASE 0x34000000 219#define CONFIG_SYS_MAX_FLASH_BANKS 1 220 221#define CONFIG_SYS_MONITOR_LEN (4 * CONFIG_ENV_SECT_SIZE) 222 223/* The ARM Boot Monitor is shipped in the lowest sector of flash */ 224 225#define FLASH_TOP (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE) 226#define CONFIG_ENV_SIZE 8192 227#define CONFIG_ENV_ADDR (FLASH_TOP - CONFIG_ENV_SECT_SIZE) 228#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 229#define CONFIG_SYS_MONITOR_BASE (CONFIG_ENV_ADDR - CONFIG_SYS_MONITOR_LEN) 230 231#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ 232#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ 233 234#endif /* __CONFIG_H */ 235