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25#ifndef __SAMSUNG_ONENAND_H__
26#define __SAMSUNG_ONENAND_H__
27
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30
31
32#ifndef __ASSEMBLY__
33struct samsung_onenand {
34 unsigned int mem_cfg;
35 unsigned char res1[0xc];
36 unsigned int burst_len;
37 unsigned char res2[0xc];
38 unsigned int mem_reset;
39 unsigned char res3[0xc];
40 unsigned int int_err_stat;
41 unsigned char res4[0xc];
42 unsigned int int_err_mask;
43 unsigned char res5[0xc];
44 unsigned int int_err_ack;
45 unsigned char res6[0xc];
46 unsigned int ecc_err_stat;
47 unsigned char res7[0xc];
48 unsigned int manufact_id;
49 unsigned char res8[0xc];
50 unsigned int device_id;
51 unsigned char res9[0xc];
52 unsigned int data_buf_size;
53 unsigned char res10[0xc];
54 unsigned int boot_buf_size;
55 unsigned char res11[0xc];
56 unsigned int buf_amount;
57 unsigned char res12[0xc];
58 unsigned int tech;
59 unsigned char res13[0xc];
60 unsigned int fba;
61 unsigned char res14[0xc];
62 unsigned int fpa;
63 unsigned char res15[0xc];
64 unsigned int fsa;
65 unsigned char res16[0x3c];
66 unsigned int sync_mode;
67 unsigned char res17[0xc];
68 unsigned int trans_spare;
69 unsigned char res18[0x3c];
70 unsigned int err_page_addr;
71 unsigned char res19[0x1c];
72 unsigned int int_pin_en;
73 unsigned char res20[0x1c];
74 unsigned int acc_clock;
75 unsigned char res21[0x1c];
76 unsigned int err_blk_addr;
77 unsigned char res22[0xc];
78 unsigned int flash_ver_id;
79 unsigned char res23[0x6c];
80 unsigned int watchdog_cnt_low;
81 unsigned char res24[0xc];
82 unsigned int watchdog_cnt_hi;
83 unsigned char res25[0xc];
84 unsigned int sync_write;
85 unsigned char res26[0x1c];
86 unsigned int cold_reset;
87 unsigned char res27[0xc];
88 unsigned int ddp_device;
89 unsigned char res28[0xc];
90 unsigned int multi_plane;
91 unsigned char res29[0x1c];
92 unsigned int trans_mode;
93 unsigned char res30[0x1c];
94 unsigned int ecc_err_stat2;
95 unsigned char res31[0xc];
96 unsigned int ecc_err_stat3;
97 unsigned char res32[0xc];
98 unsigned int ecc_err_stat4;
99 unsigned char res33[0x1c];
100 unsigned int dev_page_size;
101 unsigned char res34[0x4c];
102 unsigned int int_mon_status;
103};
104#endif
105
106#define ONENAND_MEM_RESET_HOT 0x3
107#define ONENAND_MEM_RESET_COLD 0x2
108#define ONENAND_MEM_RESET_WARM 0x1
109
110#define INT_ERR_ALL 0x3fff
111#define CACHE_OP_ERR (1 << 13)
112#define RST_CMP (1 << 12)
113#define RDY_ACT (1 << 11)
114#define INT_ACT (1 << 10)
115#define UNSUP_CMD (1 << 9)
116#define LOCKED_BLK (1 << 8)
117#define BLK_RW_CMP (1 << 7)
118#define ERS_CMP (1 << 6)
119#define PGM_CMP (1 << 5)
120#define LOAD_CMP (1 << 4)
121#define ERS_FAIL (1 << 3)
122#define PGM_FAIL (1 << 2)
123#define INT_TO (1 << 1)
124#define LD_FAIL_ECC_ERR (1 << 0)
125
126#define TSRF (1 << 0)
127
128
129extern void s3c_onenand_init(struct mtd_info *);
130
131#endif
132