LXR uboot/arch/arm/cpu/arm920t/at91/timer.c

   1/*
   2 * (C) Copyright 2002
   3 * Lineo, Inc. <www.lineo.com>
   4 * Bernhard Kuhn <bkuhn@lineo.com>
   5 *
   6 * (C) Copyright 2002
   7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   8 * Marius Groeger <mgroeger@sysgo.de>
   9 *
  10 * (C) Copyright 2002
  11 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  12 * Alex Zuepke <azu@sysgo.de>
  13 *
  14 * See file CREDITS for list of people who contributed to this
  15 * project.
  16 *
  17 * This program is free software; you can redistribute it and/or
  18 * modify it under the terms of the GNU General Public License as
  19 * published by the Free Software Foundation; either version 2 of
  20 * the License, or (at your option) any later version.
  21 *
  22 * This program is distributed in the hope that it will be useful,
  23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25 * GNU General Public License for more details.
  26 *
  27 * You should have received a copy of the GNU General Public License
  28 * along with this program; if not, write to the Free Software
  29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30 * MA 02111-1307 USA
  31 */
  32
  33#include <common.h>
  34
  35#include <asm/arch/io.h>
  36#include <asm/arch/hardware.h>
  37#include <asm/arch/at91_tc.h>
  38#include <asm/arch/at91_pmc.h>
  39
  40DECLARE_GLOBAL_DATA_PTR;
  41
  42/* the number of clocks per CONFIG_SYS_HZ */
  43#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK/CONFIG_SYS_HZ)
  44
  45int timer_init(void)
  46{
  47        at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
  48        at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
  49
  50        /* enables TC1.0 clock */
  51        writel(1 << AT91_ID_TC0, &pmc->pcer);   /* enable clock */
  52
  53        writel(0, &tc->bcr);
  54        writel(AT91_TC_BMR_TC0XC0S_NONE | AT91_TC_BMR_TC1XC1S_NONE |
  55                AT91_TC_BMR_TC2XC2S_NONE , &tc->bmr);
  56
  57        writel(AT91_TC_CCR_CLKDIS, &tc->tc[0].ccr);
  58        /* set to MCLK/2 and restart the timer
  59        when the value in TC_RC is reached */
  60        writel(AT91_TC_CMR_TCCLKS_CLOCK1 | AT91_TC_CMR_CPCTRG, &tc->tc[0].cmr);
  61
  62        writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interupts */
  63        writel(TIMER_LOAD_VAL, &tc->tc[0].rc);
  64
  65        writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr);
  66        gd->lastinc = 0;
  67        gd->tbl = 0;
  68
  69        return 0;
  70}
  71
  72/*
  73 * timer without interrupts
  74 */
  75
  76void reset_timer(void)
  77{
  78        reset_timer_masked();
  79}
  80
  81ulong get_timer(ulong base)
  82{
  83        return get_timer_masked() - base;
  84}
  85
  86void set_timer(ulong t)
  87{
  88        gd->tbl = t;
  89}
  90
  91void __udelay(unsigned long usec)
  92{
  93        udelay_masked(usec);
  94}
  95
  96void reset_timer_masked(void)
  97{
  98        /* reset time */
  99        at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
 100        gd->lastinc = readl(&tc->tc[0].cv) & 0x0000ffff;
 101        gd->tbl = 0;
 102}
 103
 104ulong get_timer_raw(void)
 105{
 106        at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
 107        u32 now;
 108
 109        now = readl(&tc->tc[0].cv) & 0x0000ffff;
 110
 111        if (now >= gd->lastinc) {
 112                /* normal mode */
 113                gd->tbl += now - gd->lastinc;
 114        } else {
 115                /* we have an overflow ... */
 116                gd->tbl += now + TIMER_LOAD_VAL - gd->lastinc;
 117        }
 118        gd->lastinc = now;
 119
 120        return gd->tbl;
 121}
 122
 123ulong get_timer_masked(void)
 124{
 125        return get_timer_raw()/TIMER_LOAD_VAL;
 126}
 127
 128void udelay_masked(unsigned long usec)
 129{
 130        u32 tmo;
 131        u32 endtime;
 132        signed long diff;
 133
 134        tmo = CONFIG_SYS_HZ_CLOCK / 1000;
 135        tmo *= usec;
 136        tmo /= 1000;
 137
 138        endtime = get_timer_raw() + tmo;
 139
 140        do {
 141                u32 now = get_timer_raw();
 142                diff = endtime - now;
 143        } while (diff >= 0);
 144}
 145
 146/*
 147 * This function is derived from PowerPC code (read timebase as long long).
 148 * On ARM it just returns the timer value.
 149 */
 150unsigned long long get_ticks(void)
 151{
 152        return get_timer(0);
 153}
 154
 155/*
 156 * This function is derived from PowerPC code (timebase clock frequency).
 157 * On ARM it returns the number of timer ticks per second.
 158 */
 159ulong get_tbclk(void)
 160{
 161        return CONFIG_SYS_HZ;
 162}
 163