1/* 2 * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr> 3 * 4 * Based on original Kirkwood support which is 5 * (C) Copyright 2009 6 * Marvell Semiconductor <www.marvell.com> 7 * Written-by: Prafulla Wadaskar <prafulla@marvell.com> 8 * 9 * See file CREDITS for list of people who contributed to this 10 * project. 11 * 12 * This program is free software; you can redistribute it and/or 13 * modify it under the terms of the GNU General Public License as 14 * published by the Free Software Foundation; either version 2 of 15 * the License, or (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 25 * MA 02110-1301 USA 26 */ 27 28#include <common.h> 29#include <config.h> 30#include <asm/arch/orion5x.h> 31 32DECLARE_GLOBAL_DATA_PTR; 33 34/* 35 * orion5x_sdram_bar - reads SDRAM Base Address Register 36 */ 37u32 orion5x_sdram_bar(enum memory_bank bank) 38{ 39 struct orion5x_ddr_addr_decode_registers *winregs = 40 (struct orion5x_ddr_addr_decode_registers *) 41 ORION5X_CPU_WIN_BASE; 42 43 u32 result = 0; 44 u32 enable = 0x01 & winregs[bank].size; 45 46 if ((!enable) || (bank > BANK3)) 47 return 0; 48 49 result = winregs[bank].base; 50 return result; 51} 52int dram_init (void) 53{ 54 /* dram_init must store complete ramsize in gd->ram_size */ 55 gd->ram_size = get_ram_size( 56 (volatile long *) orion5x_sdram_bar(0), 57 CONFIG_MAX_RAM_BANK_SIZE); 58 return 0; 59} 60 61void dram_init_banksize (void) 62{ 63 int i; 64 65 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 66 gd->bd->bi_dram[i].start = orion5x_sdram_bar(i); 67 gd->bd->bi_dram[i].size = get_ram_size( 68 (volatile long *) (gd->bd->bi_dram[i].start), 69 CONFIG_MAX_RAM_BANK_SIZE); 70 } 71} 72