uboot/arch/arm/include/asm/arch-armv7/sysctrl.h
<<
>>
Prefs
   1/*
   2 * (C) Copyright 2010 Linaro
   3 * Matt Waddel, <matt.waddel@linaro.org>
   4 *
   5 * See file CREDITS for list of people who contributed to this
   6 * project.
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License as
  10 * published by the Free Software Foundation; either version 2 of
  11 * the License, or (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, write to the Free Software
  20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21 * MA 02111-1307 USA
  22 */
  23#ifndef _SYSCTRL_H_
  24#define _SYSCTRL_H_
  25
  26/* System controller (SP810) register definitions */
  27#define SP810_TIMER0_ENSEL      (1 << 15)
  28#define SP810_TIMER1_ENSEL      (1 << 17)
  29#define SP810_TIMER2_ENSEL      (1 << 19)
  30#define SP810_TIMER3_ENSEL      (1 << 21)
  31
  32struct sysctrl {
  33        u32 scctrl;             /* 0x000 */
  34        u32 scsysstat;
  35        u32 scimctrl;
  36        u32 scimstat;
  37        u32 scxtalctrl;
  38        u32 scpllctrl;
  39        u32 scpllfctrl;
  40        u32 scperctrl0;
  41        u32 scperctrl1;
  42        u32 scperen;
  43        u32 scperdis;
  44        u32 scperclken;
  45        u32 scperstat;
  46        u32 res1[0x006];
  47        u32 scflashctrl;        /* 0x04c */
  48        u32 res2[0x3a4];
  49        u32 scsysid0;           /* 0xee0 */
  50        u32 scsysid1;
  51        u32 scsysid2;
  52        u32 scsysid3;
  53        u32 scitcr;
  54        u32 scitir0;
  55        u32 scitir1;
  56        u32 scitor;
  57        u32 sccntctrl;
  58        u32 sccntdata;
  59        u32 sccntstep;
  60        u32 res3[0x32];
  61        u32 scperiphid0;        /* 0xfe0 */
  62        u32 scperiphid1;
  63        u32 scperiphid2;
  64        u32 scperiphid3;
  65        u32 scpcellid0;
  66        u32 scpcellid1;
  67        u32 scpcellid2;
  68        u32 scpcellid3;
  69};
  70#endif /* _SYSCTRL_H_ */
  71