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26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30
31#define CONFIG_BOOKE 1
32#define CONFIG_E500 1
33#define CONFIG_MPC85xx 1
34#define CONFIG_MPC8544 1
35#define CONFIG_MPC8544DS 1
36
37#ifndef CONFIG_SYS_TEXT_BASE
38#define CONFIG_SYS_TEXT_BASE 0xfff80000
39#endif
40
41#define CONFIG_PCI 1
42#define CONFIG_PCI1 1
43#define CONFIG_PCIE1 1
44#define CONFIG_PCIE2 1
45#define CONFIG_PCIE3 1
46#define CONFIG_FSL_PCI_INIT 1
47#define CONFIG_FSL_PCIE_RESET 1
48#define CONFIG_SYS_PCI_64BIT 1
49
50#define CONFIG_FSL_LAW 1
51#define CONFIG_E1000 1
52
53#define CONFIG_TSEC_ENET
54#define CONFIG_ENV_OVERWRITE
55#define CONFIG_INTERRUPTS
56
57#ifndef __ASSEMBLY__
58extern unsigned long get_board_sys_clk(unsigned long dummy);
59#endif
60#define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0)
61
62
63
64
65#define CONFIG_L2_CACHE
66#define CONFIG_BTB
67
68
69
70
71#define CONFIG_ENABLE_36BIT_PHYS 1
72
73#define CONFIG_SYS_MEMTEST_START 0x00200000
74#define CONFIG_SYS_MEMTEST_END 0x00400000
75#define CONFIG_PANIC_HANG
76
77
78
79
80
81#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
82#define CONFIG_SYS_CCSRBAR 0xe0000000
83#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR
84#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR
85
86
87#define CONFIG_FSL_DDR2
88#undef CONFIG_FSL_DDR_INTERACTIVE
89#define CONFIG_SPD_EEPROM
90#define CONFIG_DDR_SPD
91
92#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
93#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
94
95#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
96#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
97#define CONFIG_VERY_BIG_RAM
98
99#define CONFIG_NUM_DDR_CONTROLLERS 1
100#define CONFIG_DIMM_SLOTS_PER_CTLR 1
101#define CONFIG_CHIP_SELECTS_PER_CTRL 2
102
103
104#define SPD_EEPROM_ADDRESS 0x51
105
106
107#ifndef CONFIG_SPD_EEPROM
108#error ("CONFIG_SPD_EEPROM is required")
109#endif
110
111#undef CONFIG_CLOCKS_IN_MHZ
112
113
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117
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123
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138
139
140
141#define CONFIG_SYS_BOOT_BLOCK 0xfc000000
142
143#define CONFIG_SYS_FLASH_BASE 0xff800000
144
145#define CONFIG_SYS_BR0_PRELIM 0xff801001
146#define CONFIG_SYS_BR1_PRELIM 0xfe801001
147
148#define CONFIG_SYS_OR0_PRELIM 0xff806e65
149#define CONFIG_SYS_OR1_PRELIM 0xff806e65
150
151#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE}
152
153#define CONFIG_SYS_FLASH_QUIET_TEST
154#define CONFIG_SYS_MAX_FLASH_BANKS 1
155#define CONFIG_SYS_MAX_FLASH_SECT 128
156#undef CONFIG_SYS_FLASH_CHECKSUM
157#define CONFIG_SYS_FLASH_ERASE_TOUT 60000
158#define CONFIG_SYS_FLASH_WRITE_TOUT 500
159#define CONFIG_FLASH_SHOW_PROGRESS 45
160
161#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
162
163#define CONFIG_FLASH_CFI_DRIVER
164#define CONFIG_SYS_FLASH_CFI
165#define CONFIG_SYS_FLASH_EMPTY_INFO
166
167#define CONFIG_SYS_LBC_NONCACHE_BASE 0xf8000000
168
169#define CONFIG_SYS_BR2_PRELIM 0xf8201001
170#define CONFIG_SYS_OR2_PRELIM 0xfff06ff7
171
172#define CONFIG_SYS_BR3_PRELIM 0xf8100801
173#define CONFIG_SYS_OR3_PRELIM 0xfff06ff7
174
175#define CONFIG_FSL_PIXIS 1
176#define PIXIS_BASE 0xf8100000
177#define PIXIS_ID 0x0
178#define PIXIS_VER 0x1
179#define PIXIS_PVER 0x2
180#define PIXIS_RST 0x4
181#define PIXIS_AUX 0x6
182
183#define PIXIS_SPD 0x7
184#define PIXIS_VCTL 0x10
185#define PIXIS_VCFGEN0 0x12
186#define PIXIS_VCFGEN1 0x13
187#define PIXIS_VBOOT 0x16
188#define PIXIS_VBOOT_FMAP 0x80
189#define PIXIS_VBOOT_FBANK 0x40
190#define PIXIS_VSPEED0 0x17
191#define PIXIS_VSPEED1 0x18
192#define PIXIS_VCLKH 0x19
193#define PIXIS_VCLKL 0x1A
194#define PIXIS_VSPEED2 0x1d
195#define CONFIG_SYS_PIXIS_VBOOT_MASK 0x40
196#define PIXIS_VSPEED2_TSEC1SER 0x2
197#define PIXIS_VSPEED2_TSEC3SER 0x1
198#define PIXIS_VCFGEN1_TSEC1SER 0x20
199#define PIXIS_VCFGEN1_TSEC3SER 0x40
200#define PIXIS_VSPEED2_MASK (PIXIS_VSPEED2_TSEC1SER|PIXIS_VSPEED2_TSEC3SER)
201#define PIXIS_VCFGEN1_MASK (PIXIS_VCFGEN1_TSEC1SER|PIXIS_VCFGEN1_TSEC3SER)
202
203
204#define CONFIG_SYS_INIT_RAM_LOCK 1
205#define CONFIG_SYS_INIT_RAM_ADDR 0xf4010000
206#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
207
208
209#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
210#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
211
212#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
213#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
214
215
216
217
218
219#define CONFIG_CONS_INDEX 1
220#define CONFIG_SYS_NS16550
221#define CONFIG_SYS_NS16550_SERIAL
222#define CONFIG_SYS_NS16550_REG_SIZE 1
223#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
224
225#define CONFIG_SYS_BAUDRATE_TABLE \
226 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
227
228#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
229#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
230
231
232#define CONFIG_SYS_HUSH_PARSER
233#ifdef CONFIG_SYS_HUSH_PARSER
234#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
235#endif
236
237
238#define CONFIG_OF_LIBFDT 1
239#define CONFIG_OF_BOARD_SETUP 1
240#define CONFIG_OF_STDOUT_VIA_ALIAS 1
241
242
243#define CONFIG_FSL_I2C
244#define CONFIG_HARD_I2C
245#undef CONFIG_SOFT_I2C
246#define CONFIG_SYS_I2C_SPEED 400000
247#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
248#define CONFIG_SYS_I2C_SLAVE 0x7F
249#define CONFIG_SYS_I2C_NOPROBES {0x69}
250#define CONFIG_SYS_I2C_OFFSET 0x3100
251
252
253
254
255
256#define CONFIG_SYS_PCIE_VIRT 0x80000000
257#define CONFIG_SYS_PCIE_PHYS 0x80000000
258#define CONFIG_SYS_PCI_VIRT 0xc0000000
259#define CONFIG_SYS_PCI_PHYS 0xc0000000
260
261#define CONFIG_SYS_PCI1_MEM_VIRT 0xc0000000
262#define CONFIG_SYS_PCI1_MEM_BUS 0xc0000000
263#define CONFIG_SYS_PCI1_MEM_PHYS 0xc0000000
264#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000
265#define CONFIG_SYS_PCI1_IO_VIRT 0xe1000000
266#define CONFIG_SYS_PCI1_IO_BUS 0x00000000
267#define CONFIG_SYS_PCI1_IO_PHYS 0xe1000000
268#define CONFIG_SYS_PCI1_IO_SIZE 0x00010000
269
270
271#define CONFIG_SYS_PCIE2_NAME "Slot 1"
272#define CONFIG_SYS_PCIE2_MEM_VIRT 0x80000000
273#define CONFIG_SYS_PCIE2_MEM_BUS 0x80000000
274#define CONFIG_SYS_PCIE2_MEM_PHYS 0x80000000
275#define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000
276#define CONFIG_SYS_PCIE2_IO_VIRT 0xe1010000
277#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000
278#define CONFIG_SYS_PCIE2_IO_PHYS 0xe1010000
279#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000
280
281
282#define CONFIG_SYS_PCIE1_NAME "Slot 2"
283#define CONFIG_SYS_PCIE1_MEM_VIRT 0xa0000000
284#define CONFIG_SYS_PCIE1_MEM_BUS 0xa0000000
285#define CONFIG_SYS_PCIE1_MEM_PHYS 0xa0000000
286#define CONFIG_SYS_PCIE1_MEM_SIZE 0x10000000
287#define CONFIG_SYS_PCIE1_IO_VIRT 0xe1020000
288#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
289#define CONFIG_SYS_PCIE1_IO_PHYS 0xe1020000
290#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000
291
292
293#define CONFIG_SYS_PCIE3_NAME "ULI"
294#define CONFIG_SYS_PCIE3_MEM_VIRT 0xb0000000
295#define CONFIG_SYS_PCIE3_MEM_BUS 0xb0000000
296#define CONFIG_SYS_PCIE3_MEM_PHYS 0xb0000000
297#define CONFIG_SYS_PCIE3_MEM_SIZE 0x00100000
298#define CONFIG_SYS_PCIE3_IO_VIRT 0xb0100000
299#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000
300#define CONFIG_SYS_PCIE3_IO_PHYS 0xb0100000
301#define CONFIG_SYS_PCIE3_IO_SIZE 0x00100000
302#define CONFIG_SYS_PCIE3_MEM_VIRT2 0xb0200000
303#define CONFIG_SYS_PCIE3_MEM_BUS2 0xb0200000
304#define CONFIG_SYS_PCIE3_MEM_PHYS2 0xb0200000
305#define CONFIG_SYS_PCIE3_MEM_SIZE2 0x00200000
306
307#if defined(CONFIG_PCI)
308
309
310#define VIDEO_IO_OFFSET CONFIG_SYS_PCIE2_IO_VIRT
311
312
313
314
315
316#define CONFIG_VIDEO
317
318#if defined(CONFIG_VIDEO)
319#define CONFIG_BIOSEMU
320#define CONFIG_CFB_CONSOLE
321#define CONFIG_VIDEO_SW_CURSOR
322#define CONFIG_VGA_AS_SINGLE_DEVICE
323#define CONFIG_ATI_RADEON_FB
324#define CONFIG_VIDEO_LOGO
325
326#define CONFIG_SYS_ISA_IO_BASE_ADDRESS VIDEO_IO_OFFSET
327#endif
328
329#define CONFIG_NET_MULTI
330#define CONFIG_PCI_PNP
331
332#undef CONFIG_EEPRO100
333#undef CONFIG_TULIP
334#define CONFIG_RTL8139
335
336#ifndef CONFIG_PCI_PNP
337 #define PCI_ENET0_IOADDR CONFIG_SYS_PCI1_IO_BUS
338 #define PCI_ENET0_MEMADDR CONFIG_SYS_PCI1_IO_BUS
339 #define PCI_IDSEL_NUMBER 0x11
340#endif
341
342#define CONFIG_PCI_SCAN_SHOW
343#define CONFIG_DOS_PARTITION
344#define CONFIG_SCSI_AHCI
345
346#ifdef CONFIG_SCSI_AHCI
347#define CONFIG_SATA_ULI5288
348#define CONFIG_SYS_SCSI_MAX_SCSI_ID 4
349#define CONFIG_SYS_SCSI_MAX_LUN 1
350#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN)
351#define CONFIG_SYS_SCSI_MAXDEVICE CONFIG_SYS_SCSI_MAX_DEVICE
352#endif
353
354#endif
355
356
357#if defined(CONFIG_TSEC_ENET)
358
359#ifndef CONFIG_NET_MULTI
360#define CONFIG_NET_MULTI 1
361#endif
362
363#define CONFIG_MII 1
364#define CONFIG_MII_DEFAULT_TSEC 1
365#define CONFIG_TSEC1 1
366#define CONFIG_TSEC1_NAME "eTSEC1"
367#define CONFIG_TSEC3 1
368#define CONFIG_TSEC3_NAME "eTSEC3"
369
370#define CONFIG_PIXIS_SGMII_CMD
371#define CONFIG_FSL_SGMII_RISER 1
372#define SGMII_RISER_PHY_OFFSET 0x1c
373
374#define TSEC1_PHY_ADDR 0
375#define TSEC3_PHY_ADDR 1
376
377#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
378#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
379
380#define TSEC1_PHYIDX 0
381#define TSEC3_PHYIDX 0
382
383#define CONFIG_ETHPRIME "eTSEC1"
384
385#define CONFIG_PHY_GIGE 1
386#endif
387
388
389
390
391#define CONFIG_ENV_IS_IN_FLASH 1
392#if CONFIG_SYS_MONITOR_BASE > 0xfff80000
393#define CONFIG_ENV_ADDR 0xfff80000
394#else
395#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0x70000)
396#endif
397#define CONFIG_ENV_SIZE 0x2000
398#define CONFIG_ENV_SECT_SIZE 0x10000
399
400#define CONFIG_LOADS_ECHO 1
401#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
402
403
404
405
406#define CONFIG_BOOTP_BOOTFILESIZE
407#define CONFIG_BOOTP_BOOTPATH
408#define CONFIG_BOOTP_GATEWAY
409#define CONFIG_BOOTP_HOSTNAME
410
411
412
413
414
415#include <config_cmd_default.h>
416
417#define CONFIG_CMD_PING
418#define CONFIG_CMD_I2C
419#define CONFIG_CMD_MII
420#define CONFIG_CMD_ELF
421#define CONFIG_CMD_IRQ
422#define CONFIG_CMD_SETEXPR
423#define CONFIG_CMD_REGINFO
424
425#if defined(CONFIG_PCI)
426 #define CONFIG_CMD_PCI
427 #define CONFIG_CMD_NET
428 #define CONFIG_CMD_SCSI
429 #define CONFIG_CMD_EXT2
430#endif
431
432
433#undef CONFIG_WATCHDOG
434
435
436
437
438#define CONFIG_SYS_LONGHELP
439#define CONFIG_CMDLINE_EDITING
440#define CONFIG_AUTO_COMPLETE
441#define CONFIG_SYS_LOAD_ADDR 0x2000000
442#define CONFIG_SYS_PROMPT "=> "
443#if defined(CONFIG_CMD_KGDB)
444#define CONFIG_SYS_CBSIZE 1024
445#else
446#define CONFIG_SYS_CBSIZE 256
447#endif
448#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
449#define CONFIG_SYS_MAXARGS 16
450#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
451#define CONFIG_SYS_HZ 1000
452
453
454
455
456
457
458#define CONFIG_SYS_BOOTMAPSZ (16 << 20)
459#define CONFIG_SYS_BOOTM_LEN (16 << 20)
460
461#if defined(CONFIG_CMD_KGDB)
462#define CONFIG_KGDB_BAUDRATE 230400
463#define CONFIG_KGDB_SER_INDEX 2
464#endif
465
466
467
468
469
470
471#if defined(CONFIG_TSEC_ENET)
472#define CONFIG_HAS_ETH0
473#define CONFIG_ETHADDR 00:E0:0C:02:00:FD
474#define CONFIG_HAS_ETH1
475#define CONFIG_ETH1ADDR 00:E0:0C:02:01:FD
476#endif
477
478#define CONFIG_IPADDR 192.168.1.251
479
480#define CONFIG_HOSTNAME 8544ds_unknown
481#define CONFIG_ROOTPATH /nfs/mpc85xx
482#define CONFIG_BOOTFILE 8544ds/uImage.uboot
483#define CONFIG_UBOOTPATH 8544ds/u-boot.bin
484
485#define CONFIG_SERVERIP 192.168.1.1
486#define CONFIG_GATEWAYIP 192.168.1.1
487#define CONFIG_NETMASK 255.255.0.0
488
489#define CONFIG_LOADADDR 1000000
490
491#define CONFIG_BOOTDELAY 10
492#undef CONFIG_BOOTARGS
493
494#define CONFIG_BAUDRATE 115200
495
496#define CONFIG_EXTRA_ENV_SETTINGS \
497 "netdev=eth0\0" \
498 "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
499 "tftpflash=tftpboot $loadaddr $uboot; " \
500 "protect off " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
501 "erase " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
502 "cp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize; " \
503 "protect on " MK_STR(CONFIG_SYS_TEXT_BASE) " +$filesize; " \
504 "cmp.b $loadaddr " MK_STR(CONFIG_SYS_TEXT_BASE) " $filesize\0" \
505 "consoledev=ttyS0\0" \
506 "ramdiskaddr=2000000\0" \
507 "ramdiskfile=8544ds/ramdisk.uboot\0" \
508 "fdtaddr=c00000\0" \
509 "fdtfile=8544ds/mpc8544ds.dtb\0" \
510 "bdev=sda3\0"
511
512#define CONFIG_NFSBOOTCOMMAND \
513 "setenv bootargs root=/dev/nfs rw " \
514 "nfsroot=$serverip:$rootpath " \
515 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
516 "console=$consoledev,$baudrate $othbootargs;" \
517 "tftp $loadaddr $bootfile;" \
518 "tftp $fdtaddr $fdtfile;" \
519 "bootm $loadaddr - $fdtaddr"
520
521#define CONFIG_RAMBOOTCOMMAND \
522 "setenv bootargs root=/dev/ram rw " \
523 "console=$consoledev,$baudrate $othbootargs;" \
524 "tftp $ramdiskaddr $ramdiskfile;" \
525 "tftp $loadaddr $bootfile;" \
526 "tftp $fdtaddr $fdtfile;" \
527 "bootm $loadaddr $ramdiskaddr $fdtaddr"
528
529#define CONFIG_BOOTCOMMAND \
530 "setenv bootargs root=/dev/$bdev rw " \
531 "console=$consoledev,$baudrate $othbootargs;" \
532 "tftp $loadaddr $bootfile;" \
533 "tftp $fdtaddr $fdtfile;" \
534 "bootm $loadaddr - $fdtaddr"
535
536#endif
537