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23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
27
28
29
30
31#define CONFIG_405GP 1
32#define CONFIG_4xx 1
33#define CONFIG_PMC405 1
34
35#define CONFIG_SYS_TEXT_BASE 0xFFF80000
36
37#define CONFIG_BOARD_EARLY_INIT_F 1
38#define CONFIG_MISC_INIT_R 1
39
40#define CONFIG_SYS_CLK_FREQ 33330000
41
42#define CONFIG_BAUDRATE 9600
43#define CONFIG_BOOTDELAY 3
44
45
46#define CONFIG_AUTOBOOT_KEYED 1
47#define CONFIG_AUTOBOOT_PROMPT \
48 "Press SPACE to abort autoboot in %d seconds\n", bootdelay
49#undef CONFIG_AUTOBOOT_DELAY_STR
50#define CONFIG_AUTOBOOT_STOP_STR " "
51
52#undef CONFIG_BOOTARGS
53#undef CONFIG_BOOTCOMMAND
54
55#define CONFIG_PREBOOT
56
57#define CFG_BOOTM_LEN 0x1000000
58
59#define CONFIG_LOADS_ECHO 1
60#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
61
62#define CONFIG_NET_MULTI 1
63#undef CONFIG_HAS_ETH1
64
65#define CONFIG_PPC4xx_EMAC
66#define CONFIG_MII 1
67#define CONFIG_PHY_ADDR 0
68#define CONFIG_LXT971_NO_SLEEP 1
69#define CONFIG_RESET_PHY_R 1
70
71
72
73
74#define CONFIG_BOOTP_BOOTFILESIZE
75#define CONFIG_BOOTP_BOOTPATH
76#define CONFIG_BOOTP_GATEWAY
77#define CONFIG_BOOTP_HOSTNAME
78
79
80
81
82#include <config_cmd_default.h>
83
84#define CONFIG_CMD_BSP
85#define CONFIG_CMD_PCI
86#define CONFIG_CMD_IRQ
87#define CONFIG_CMD_ELF
88#define CONFIG_CMD_DATE
89#define CONFIG_CMD_JFFS2
90#define CONFIG_CMD_MII
91#define CONFIG_CMD_I2C
92#define CONFIG_CMD_PING
93#define CONFIG_CMD_UNIVERSE
94#define CONFIG_CMD_EEPROM
95
96#define CONFIG_MAC_PARTITION
97#define CONFIG_DOS_PARTITION
98
99#undef CONFIG_WATCHDOG
100
101#define CONFIG_RTC_MC146818
102#define CONFIG_SYS_RTC_REG_BASE_ADDR 0xF0000500
103
104#define CONFIG_SDRAM_BANK0 1
105
106
107
108
109#define CONFIG_SYS_LONGHELP
110#define CONFIG_SYS_PROMPT "=> "
111
112#undef CONFIG_SYS_HUSH_PARSER
113#ifdef CONFIG_SYS_HUSH_PARSER
114#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
115#endif
116
117#if defined(CONFIG_CMD_KGDB)
118#define CONFIG_SYS_CBSIZE 1024
119#else
120#define CONFIG_SYS_CBSIZE 512
121#endif
122#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
123#define CONFIG_SYS_MAXARGS 16
124#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
125
126#define CONFIG_SYS_DEVICE_NULLDEV 1
127
128#define CONFIG_SYS_CONSOLE_INFO_QUIET 1
129
130#define CONFIG_AUTO_COMPLETE 1
131
132#define CONFIG_SYS_MEMTEST_START 0x0400000
133#define CONFIG_SYS_MEMTEST_END 0x0C00000
134
135#define CONFIG_CONS_INDEX 1
136#define CONFIG_SYS_NS16550
137#define CONFIG_SYS_NS16550_SERIAL
138#define CONFIG_SYS_NS16550_REG_SIZE 1
139#define CONFIG_SYS_NS16550_CLK get_serial_clock()
140
141#undef CONFIG_SYS_EXT_SERIAL_CLOCK
142#define CONFIG_SYS_BASE_BAUD 806400
143
144
145#define CONFIG_SYS_BAUDRATE_TABLE \
146 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
147
148#define CONFIG_SYS_LOAD_ADDR 0x100000
149#define CONFIG_SYS_EXTBDINFO 1
150
151#define CONFIG_SYS_HZ 1000
152
153#define CONFIG_CMDLINE_EDITING 1
154#define CONFIG_LOOPW 1
155
156#define CONFIG_ZERO_BOOTDELAY_CHECK
157
158#define CONFIG_VERSION_VARIABLE 1
159
160#define CONFIG_SYS_RX_ETH_BUFFER 16
161
162
163
164
165#define PCI_HOST_ADAPTER 0
166#define PCI_HOST_FORCE 1
167#define PCI_HOST_AUTO 2
168
169#define CONFIG_PCI
170#define CONFIG_PCI_HOST PCI_HOST_AUTO
171#define CONFIG_PCI_PNP
172
173
174#define CONFIG_PCI_SCAN_SHOW
175
176#define CONFIG_PCI_CONFIG_HOST_BRIDGE 1
177
178#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x12FE
179#define CONFIG_SYS_PCI_SUBSYS_DEVICEID_NONMONARCH 0x0408
180#define CONFIG_SYS_PCI_SUBSYS_DEVICEID_MONARCH 0x0409
181#define CONFIG_SYS_PCI_SUBSYS_DEVICEID pmc405_pci_subsys_deviceid()
182
183#define CONFIG_SYS_PCI_CLASSCODE 0x0b20
184
185#define CONFIG_SYS_PCI_PTM1LA (bd->bi_memstart)
186#define CONFIG_SYS_PCI_PTM1MS (~(bd->bi_memsize - 1) | 1)
187#define CONFIG_SYS_PCI_PTM1PCI 0x00000000
188#define CONFIG_SYS_PCI_PTM2LA 0xef000000
189#define CONFIG_SYS_PCI_PTM2MS 0xff000001
190#define CONFIG_SYS_PCI_PTM2PCI 0x00000000
191
192#define CONFIG_PCI_4xx_PTM_OVERWRITE 1
193
194
195
196
197
198
199#define CONFIG_SYS_SDRAM_BASE 0x00000000
200#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
201#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1)
202#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
203
204#define CONFIG_PRAM 0
205
206
207
208
209
210
211#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
212
213
214
215
216#define CONFIG_SYS_FLASH_BASE 0xFE000000
217#define CONFIG_SYS_FLASH_INCREMENT 0x01000000
218
219#define CONFIG_SYS_FLASH_CFI 1
220#define CONFIG_FLASH_CFI_DRIVER 1
221#define CONFIG_SYS_FLASH_PROTECTION 1
222#define CONFIG_SYS_FLASH_AUTOPROTECT_LIST {{0xfff80000, 0x80000}}
223#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
224#define CONFIG_SYS_MAX_FLASH_BANKS 2
225#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, \
226 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_INCREMENT}
227#define CONFIG_SYS_MAX_FLASH_SECT 128
228#define CONFIG_SYS_FLASH_EMPTY_INFO
229
230
231
232
233#define CONFIG_ENV_IS_IN_EEPROM 1
234
235
236#define CONFIG_ENV_OFFSET 0x000
237#define CONFIG_ENV_SIZE 0x800
238
239#define CONFIG_SYS_NVRAM_BASE_ADDR 0xF0000500
240#define CONFIG_SYS_NVRAM_SIZE 242
241
242
243
244
245#define CONFIG_HARD_I2C
246#define CONFIG_PPC4XX_I2C
247#define CONFIG_SYS_I2C_SPEED 100000
248#define CONFIG_SYS_I2C_SLAVE 0x7F
249
250#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
251#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
252
253#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
254#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
255
256
257
258#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
259
260
261
262
263#define FLASH0_BA 0xFF000000
264#define FLASH1_BA 0xFE000000
265#define CAN_BA 0xF0000000
266#define RTC_BA 0xF0000500
267#define NVRAM_BA 0xF0200000
268
269
270#define CONFIG_SYS_EBC_PB0AP 0x92015480
271
272#define CONFIG_SYS_EBC_PB0CR (FLASH0_BA | 0x9A000)
273
274
275#define CONFIG_SYS_EBC_PB1AP 0x92015480
276
277#define CONFIG_SYS_EBC_PB1CR (FLASH1_BA | 0x9A000)
278
279
280
281#define CONFIG_SYS_EBC_PB2AP 0x03000440
282
283#define CONFIG_SYS_EBC_PB2CR (CAN_BA | 0x18000)
284
285
286
287
288
289#define CONFIG_SYS_EBC_PB4AP 0x03000440
290
291#define CONFIG_SYS_EBC_PB4CR (NVRAM_BA | 0x18000)
292
293
294
295
296
297#define CONFIG_SYS_FPGA_PRG 0x04000000
298#define CONFIG_SYS_FPGA_CLK 0x02000000
299#define CONFIG_SYS_FPGA_DATA 0x01000000
300#define CONFIG_SYS_FPGA_INIT 0x00010000
301#define CONFIG_SYS_FPGA_DONE 0x00008000
302
303
304#define CONFIG_SYS_VXWORKS_MAC_PTR 0x00000000
305
306
307
308
309#define CONFIG_SYS_VPEN (0x80000000 >> 3)
310#define CONFIG_SYS_NONMONARCH (0x80000000 >> 14)
311#define CONFIG_SYS_XEREADY (0x80000000 >> 15)
312#define CONFIG_SYS_INTA_FAKE (0x80000000 >> 19)
313#define CONFIG_SYS_SELF_RST (0x80000000 >> 21)
314#define CONFIG_SYS_REV1_2 (0x80000000 >> 23)
315
316
317
318
319
320
321#define CONFIG_SYS_TEMP_STACK_OCM 1
322
323
324#define CONFIG_SYS_OCM_DATA_ADDR 0xF8000000
325#define CONFIG_SYS_OCM_DATA_SIZE 0x1000
326
327
328#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR
329
330
331#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE
332
333
334#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
335 GENERATED_GBL_DATA_SIZE)
336#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
337
338#define CONFIG_OF_LIBFDT
339#define CONFIG_OF_BOARD_SETUP
340
341#endif
342