LXR uboot/include/configs/csb272.h

   1/*
   2 * (C) Copyright 2004
   3 * Tolunay Orkun, Nextio Inc., torkun@nextio.com
   4 *
   5 * See file CREDITS for list of people who contributed to this
   6 * project.
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License as
  10 * published by the Free Software Foundation; either version 2 of
  11 * the License, or (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, write to the Free Software
  20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21 * MA 02111-1307 USA
  22 */
  23
  24/*
  25 * board/config.h - configuration options, board specific
  26 */
  27
  28#ifndef __CONFIG_H
  29#define __CONFIG_H
  30
  31/*
  32 * High Level Configuration Options
  33 * (easy to change)
  34 */
  35
  36#define CONFIG_405GP            1       /* This is a PPC405GP CPU       */
  37#define CONFIG_4xx              1       /* ...member of PPC4xx family   */
  38#define CONFIG_CSB272           1       /* on a Cogent CSB272 board     */
  39#define CONFIG_BOARD_EARLY_INIT_F 1     /* Call board_early_init_f()    */
  40#define CONFIG_LAST_STAGE_INIT  1       /* Call last_stage_init()       */
  41#define CONFIG_SYS_CLK_FREQ     33000000 /* external frequency to pll   */
  42
  43#define CONFIG_SYS_TEXT_BASE    0xFFFC0000
  44
  45/*
  46 * OS Bootstrap configuration
  47 *
  48 */
  49
  50#if 0
  51#define CONFIG_BOOTDELAY        -1      /* autoboot disabled */
  52#else
  53#define CONFIG_BOOTDELAY        3       /* autoboot after X seconds     */
  54#endif
  55
  56#define CONFIG_ZERO_BOOTDELAY_CHECK     /* check keypress when bootdelay = 0 */
  57
  58#if 1
  59#undef  CONFIG_BOOTARGS
  60#define CONFIG_BOOTCOMMAND \
  61        "setenv bootargs console=ttyS0,38400 debug " \
  62        "root=/dev/ram rw ramdisk_size=4096 " \
  63        "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; " \
  64        "bootm fe000000 fe100000"
  65#endif
  66
  67#if 0
  68#undef  CONFIG_BOOTARGS
  69#define CONFIG_BOOTCOMMAND \
  70        "bootp; " \
  71        "setenv bootargs console=ttyS0,38400 debug " \
  72        "root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
  73        "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; " \
  74        "bootm"
  75#endif
  76
  77/*
  78 * BOOTP options
  79 */
  80#define CONFIG_BOOTP_SUBNETMASK
  81#define CONFIG_BOOTP_GATEWAY
  82#define CONFIG_BOOTP_HOSTNAME
  83#define CONFIG_BOOTP_BOOTPATH
  84#define CONFIG_BOOTP_BOOTFILESIZE
  85#define CONFIG_BOOTP_DNS2
  86
  87
  88/*
  89 * Command line configuration.
  90 */
  91#include <config_cmd_default.h>
  92
  93#define CONFIG_CMD_ASKENV
  94#define CONFIG_CMD_BEDBUG
  95#define CONFIG_CMD_ELF
  96#define CONFIG_CMD_IRQ
  97#define CONFIG_CMD_I2C
  98#define CONFIG_CMD_PCI
  99#define CONFIG_CMD_DATE
 100#define CONFIG_CMD_MII
 101#define CONFIG_CMD_PING
 102#define CONFIG_CMD_DHCP
 103
 104
 105/*
 106 * Serial download configuration
 107 *
 108 */
 109#define CONFIG_LOADS_ECHO       1       /* echo on for serial download  */
 110#define CONFIG_SYS_LOADS_BAUD_CHANGE    1       /* allow baudrate change        */
 111
 112/*
 113 * KGDB Configuration
 114 *
 115 */
 116#if defined(CONFIG_CMD_KGDB)
 117#define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 118#define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
 119#endif
 120
 121/*
 122 * Miscellaneous configurable options
 123 *
 124 */
 125#undef  CONFIG_SYS_HUSH_PARSER                  /* use "hush" command parser */
 126#ifdef  CONFIG_SYS_HUSH_PARSER
 127#define CONFIG_SYS_PROMPT_HUSH_PS2      "> "    /* hush shell secondary prompt */
 128#endif
 129
 130#define CONFIG_SYS_LONGHELP                     /* undef to save memory */
 131#define CONFIG_SYS_PROMPT               "=> "   /* Monitor Command Prompt */
 132#if defined(CONFIG_CMD_KGDB)
 133#define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size */
 134#else
 135#define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 136#endif
 137#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 138#define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 139#define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size */
 140
 141#define CONFIG_SYS_MEMTEST_START        0x0400000 /* memtest works on */
 142#define CONFIG_SYS_MEMTEST_END          0x0C00000 /* 4 ... 12 MB in DRAM */
 143
 144#define CONFIG_SYS_HZ                   1000    /* decrementer freq: 1 ms ticks */
 145#define CONFIG_SYS_EXTBDINFO            1       /* To use extended board_info (bd_t) */
 146#define CONFIG_SYS_LOAD_ADDR            0x100000 /* default load address */
 147
 148/*
 149 * For booting Linux, the board info and command line data
 150 * have to be in the first 8 MB of memory, since this is
 151 * the maximum mapped by the Linux kernel during initialization.
 152 */
 153#define CONFIG_SYS_BOOTMAPSZ            (8 << 20) /* Initial Memory map for Linux */
 154
 155/*
 156 * watchdog configuration
 157 *
 158 */
 159#undef  CONFIG_WATCHDOG                 /* watchdog disabled */
 160
 161/*
 162 * UART configuration
 163 *
 164 */
 165#define CONFIG_CONS_INDEX               1       /* Use UART0            */
 166#define CONFIG_SYS_NS16550
 167#define CONFIG_SYS_NS16550_SERIAL
 168#define CONFIG_SYS_NS16550_REG_SIZE     1
 169#define CONFIG_SYS_NS16550_CLK          get_serial_clock()
 170
 171#define CONFIG_SYS_EXT_SERIAL_CLOCK     3868400 /* use external serial clock */
 172#undef  CONFIG_SYS_BASE_BAUD
 173#define CONFIG_BAUDRATE         38400   /* Default baud rate */
 174#define CONFIG_SYS_BAUDRATE_TABLE      \
 175    { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400 }
 176
 177/*
 178 * I2C configuration
 179 *
 180 */
 181#define CONFIG_HARD_I2C         1       /* I2C with hardware support    */
 182#define CONFIG_PPC4XX_I2C               /* use PPC4xx driver            */
 183#define CONFIG_SYS_I2C_SPEED            100000  /* I2C speed                    */
 184#define CONFIG_SYS_I2C_SLAVE            0x7F    /* I2C slave address            */
 185
 186/*
 187 * MII PHY configuration
 188 *
 189 */
 190#define CONFIG_PPC4xx_EMAC
 191#define CONFIG_MII              1       /* MII PHY management           */
 192#define CONFIG_PHY_ADDR         0       /* PHY address                  */
 193#define CONFIG_PHY_CMD_DELAY    40      /* PHY COMMAND delay            */
 194                                        /* 32usec min. for LXT971A      */
 195#define CONFIG_PHY_RESET_DELAY  300     /* PHY RESET recovery delay     */
 196#define CONFIG_NET_MULTI
 197
 198/*
 199 * RTC configuration
 200 *
 201 * Note that DS1307 RTC is limited to 100Khz I2C bus.
 202 *
 203 */
 204#define CONFIG_RTC_DS1307               /* Use Dallas 1307 RTC          */
 205
 206/*
 207 * PCI stuff
 208 *
 209 */
 210#define CONFIG_PCI                      /* include pci support          */
 211#define PCI_HOST_ADAPTER        0       /* configure ar pci adapter     */
 212#define PCI_HOST_FORCE          1       /* configure as pci host        */
 213#define PCI_HOST_AUTO           2       /* detected via arbiter enable  */
 214
 215#define CONFIG_PCI_HOST PCI_HOST_FORCE  /* select pci host function     */
 216#define CONFIG_PCI_PNP                  /* do pci plug-and-play         */
 217                                        /* resource configuration       */
 218#undef  CONFIG_PCI_SCAN_SHOW            /* print pci devices @ startup  */
 219#define CONFIG_PCI_BOOTDELAY    0       /* enable pci bootdelay variable*/
 220
 221#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x0000  /* PCI Vendor ID: to-do!!!      */
 222#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0000  /* PCI Device ID: to-do!!!      */
 223#define CONFIG_SYS_PCI_PTM1LA  0x00000000      /* point to sdram               */
 224#define CONFIG_SYS_PCI_PTM1MS  0x80000001      /* 2GB, enable hard-wired to 1  */
 225#define CONFIG_SYS_PCI_PTM1PCI 0x00000000      /* Host: use this pci address   */
 226#define CONFIG_SYS_PCI_PTM2LA  0x00000000      /* disabled                     */
 227#define CONFIG_SYS_PCI_PTM2MS  0x00000000      /* disabled                     */
 228#define CONFIG_SYS_PCI_PTM2PCI 0x04000000      /* Host: use this pci address   */
 229
 230/*
 231 * IDE stuff
 232 *
 233 */
 234#undef  CONFIG_IDE_PCMCIA               /* no pcmcia interface required */
 235#undef  CONFIG_IDE_LED                  /* no led for ide supported     */
 236#undef  CONFIG_IDE_RESET                /* no reset for ide supported   */
 237
 238/*
 239 * Environment configuration
 240 *
 241 */
 242#define CONFIG_ENV_IS_IN_FLASH  1       /* environment is in FLASH      */
 243#undef CONFIG_ENV_IS_IN_NVRAM
 244#undef CONFIG_ENV_IS_IN_EEPROM
 245
 246/*
 247 * General Memory organization
 248 *
 249 * Start addresses for the final memory configuration
 250 * (Set up by the startup code)
 251 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 252 */
 253#define CONFIG_SYS_SDRAM_BASE           0x00000000
 254#define CONFIG_SYS_FLASH_BASE           0xFE000000
 255#define CONFIG_SYS_FLASH_SIZE           0x02000000
 256#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
 257#define CONFIG_SYS_MONITOR_LEN          (256 * 1024) /* Reserve 256 KB for Monitor */
 258#define CONFIG_SYS_MALLOC_LEN           (128 * 1024) /* Reserve 128 KB for malloc() */
 259
 260#if CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE
 261#define CONFIG_SYS_RAMSTART
 262#endif
 263
 264#if defined(CONFIG_ENV_IS_IN_FLASH)
 265#define CONFIG_ENV_IN_OWN_SECTOR        1          /* Give Environment own sector */
 266#define CONFIG_ENV_ADDR         0xFFF00000 /* Address of Environment Sector */
 267#define CONFIG_ENV_SIZE         0x00001000 /* Size of Environment */
 268#define CONFIG_ENV_SECT_SIZE    0x00040000 /* Size of Environment Sector */
 269#endif
 270
 271/*
 272 * FLASH Device configuration
 273 *
 274 */
 275#define CONFIG_SYS_FLASH_CFI            1       /* flash is CFI conformant      */
 276#define CONFIG_FLASH_CFI_DRIVER 1       /* use common cfi driver        */
 277#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1     /* use buffered writes (20x faster) */
 278#define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max # of memory banks        */
 279#define CONFIG_SYS_FLASH_INCREMENT      0       /* there is only one bank       */
 280#define CONFIG_SYS_MAX_FLASH_SECT       128     /* max # of sectors on one chip */
 281#define CONFIG_SYS_FLASH_PROTECTION     1       /* hardware flash protection    */
 282#define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE }
 283
 284/*
 285 * On Chip Memory location/size
 286 *
 287 */
 288#define CONFIG_SYS_OCM_DATA_ADDR        0xF8000000
 289#define CONFIG_SYS_OCM_DATA_SIZE        0x1000
 290
 291/*
 292 * Global info and initial stack
 293 *
 294 */
 295#define CONFIG_SYS_INIT_RAM_ADDR        CONFIG_SYS_OCM_DATA_ADDR /* inside of on-chip SRAM */
 296#define CONFIG_SYS_INIT_RAM_SIZE        CONFIG_SYS_OCM_DATA_SIZE /* Size of used area in RAM */
 297#define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 298#define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 299
 300/*
 301 * Miscellaneous board specific definitions
 302 *
 303 */
 304#define CONFIG_SYS_I2C_PLL_ADDR 0x58    /* I2C address of AMIS FS6377-01 PLL */
 305#define CONFIG_I2CFAST          1       /* enable "i2cfast" env. setting     */
 306
 307#endif  /* __CONFIG_H */
 308