1/* 2 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License as 6 * published by the Free Software Foundation; either version 2 of 7 * the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 17 * MA 02111-1307 USA 18 */ 19 20#ifndef __CONFIG_H 21#define __CONFIG_H 22 23/*=======*/ 24/* Board */ 25/*=======*/ 26#define SCHMOOGIE 27#define CONFIG_SYS_NAND_LARGEPAGE 28#define CONFIG_SYS_USE_NAND 29#define CONFIG_DISPLAY_CPUINFO 30/*===================*/ 31/* SoC Configuration */ 32/*===================*/ 33#define CONFIG_ARM926EJS /* arm926ejs CPU core */ 34#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ 35#define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ 36#define CONFIG_SYS_HZ 1000 37#define CONFIG_SOC_DM644X 38/*=============*/ 39/* Memory Info */ 40/*=============*/ 41#define CONFIG_SYS_MALLOC_LEN (0x10000 + 256*1024) /* malloc() len */ 42#define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */ 43#define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */ 44#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ 45#define CONFIG_STACKSIZE (256*1024) /* regular stack */ 46#define PHYS_SDRAM_1 0x80000000 /* DDR Start */ 47#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ 48#define DDR_4BANKS /* 4-bank DDR2 (128MB) */ 49/*====================*/ 50/* Serial Driver info */ 51/*====================*/ 52#define CONFIG_SYS_NS16550 53#define CONFIG_SYS_NS16550_SERIAL 54#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */ 55#define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */ 56#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK /* Input clock to NS16550 */ 57#define CONFIG_CONS_INDEX 1 /* use UART0 for console */ 58#define CONFIG_BAUDRATE 115200 /* Default baud rate */ 59#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 60/*===================*/ 61/* I2C Configuration */ 62/*===================*/ 63#define CONFIG_HARD_I2C 64#define CONFIG_DRIVER_DAVINCI_I2C 65#define CONFIG_SYS_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */ 66#define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ 67/*==================================*/ 68/* Network & Ethernet Configuration */ 69/*==================================*/ 70#define CONFIG_DRIVER_TI_EMAC 71#define CONFIG_EMAC_MDIO_PHY_NUM 1 72#define CONFIG_MII 73#define CONFIG_BOOTP_DEFAULT 74#define CONFIG_BOOTP_DNS 75#define CONFIG_BOOTP_DNS2 76#define CONFIG_BOOTP_SEND_HOSTNAME 77#define CONFIG_NET_RETRY_COUNT 10 78#define CONFIG_OVERWRITE_ETHADDR_ONCE 79#define CONFIG_NET_MULTI 80/*=====================*/ 81/* Flash & Environment */ 82/*=====================*/ 83#undef CONFIG_ENV_IS_IN_FLASH 84#define CONFIG_SYS_NO_FLASH 85#define CONFIG_NAND_DAVINCI 86#define CONFIG_SYS_NAND_CS 2 87#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ 88#define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */ 89#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 90#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ 91#define CONFIG_SYS_NAND_BASE 0x02000000 92#define CONFIG_SYS_NAND_HW_ECC 93#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ 94#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ 95/*=====================*/ 96/* Board related stuff */ 97/*=====================*/ 98#define CONFIG_RTC_DS1307 /* RTC chip on SCHMOOGIE */ 99#define CONFIG_SYS_I2C_RTC_ADDR 0x6f /* RTC chip I2C address */ 100#define CONFIG_UID_DS28CM00 /* Unique ID on SCHMOOGIE */ 101#define CONFIG_SYS_UID_ADDR 0x50 /* UID chip I2C address */ 102/*==============================*/ 103/* U-Boot general configuration */ 104/*==============================*/ 105#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ 106#define CONFIG_MISC_INIT_R 107#undef CONFIG_BOOTDELAY 108#define CONFIG_BOOTFILE "uImage" /* Boot file name */ 109#define CONFIG_SYS_PROMPT "U-Boot > " /* Monitor Command Prompt */ 110#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 111#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buffer sz */ 112#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 113#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 114#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* default Linux kernel load address */ 115#define CONFIG_VERSION_VARIABLE 116#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */ 117#define CONFIG_SYS_HUSH_PARSER 118#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 119#define CONFIG_CMDLINE_EDITING 120#define CONFIG_SYS_LONGHELP 121#define CONFIG_CRC32_VERIFY 122#define CONFIG_MX_CYCLIC 123/*===================*/ 124/* Linux Information */ 125/*===================*/ 126#define LINUX_BOOT_PARAM_ADDR 0x80000100 127#define CONFIG_CMDLINE_TAG 128#define CONFIG_SETUP_MEMORY_TAGS 129#define CONFIG_BOOTARGS "mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp" 130#define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot" 131/*=================*/ 132/* U-Boot commands */ 133/*=================*/ 134#include <config_cmd_default.h> 135#define CONFIG_CMD_ASKENV 136#define CONFIG_CMD_DHCP 137#define CONFIG_CMD_DIAG 138#define CONFIG_CMD_I2C 139#define CONFIG_CMD_MII 140#define CONFIG_CMD_PING 141#define CONFIG_CMD_SAVES 142#define CONFIG_CMD_DATE 143#define CONFIG_CMD_NAND 144#undef CONFIG_CMD_EEPROM 145#undef CONFIG_CMD_BDI 146#undef CONFIG_CMD_FPGA 147#undef CONFIG_CMD_SETGETDCR 148#undef CONFIG_CMD_FLASH 149#undef CONFIG_CMD_IMLS 150 151#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */ 152 153#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 154#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 155#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ 156 CONFIG_SYS_INIT_RAM_SIZE - \ 157 GENERATED_GBL_DATA_SIZE) 158 159#endif /* __CONFIG_H */ 160