1/* 2 * (C) Copyright 2007 3 * Heiko Schocher, DENX Software Engineering, hs@denx.de. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24#ifndef __CONFIG_H 25#define __CONFIG_H 26/* 27 * High Level Configuration Options 28 * (easy to change) 29 */ 30#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ 31#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ 32#define CONFIG_MPC5200_DDR 1 /* (with DDR-SDRAM) */ 33#define CONFIG_MUNICES 1 /* ... on MUNICes board */ 34 35#ifndef CONFIG_SYS_TEXT_BASE 36#define CONFIG_SYS_TEXT_BASE 0xFFF00000 37#endif 38 39#define CONFIG_SYS_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */ 40#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ 41#define CONFIG_HIGH_BATS 1 /* High BATs supported */ 42 43/* 44 * Command line configuration. 45 */ 46#include <config_cmd_default.h> 47 48#define CONFIG_CMD_ASKENV 49#define CONFIG_CMD_ELF 50#define CONFIG_CMD_IMMAP 51#define CONFIG_CMD_NET 52#define CONFIG_CMD_PING 53#define CONFIG_CMD_REGINFO 54 55#if defined(CONFIG_CMD_KGDB) 56# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ 57#endif 58 59/* 60 * Serial console configuration 61 */ 62#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */ 63#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ 64#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } 65 66#define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */ 67#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ 68#undef CONFIG_BOOTARGS 69 70#define CONFIG_PREBOOT "echo;" \ 71 "echo Type \"run net_nfs\" to load Kernel over TFTP and to mount root filesystem over NFS;" \ 72 "echo" 73 74#define CONFIG_EXTRA_ENV_SETTINGS \ 75 "netdev=eth0\0" \ 76 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 77 "nfsroot=$(serverip):$(rootpath)\0" \ 78 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 79 "addip=setenv bootargs $(bootargs) " \ 80 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \ 81 ":$(hostname):$(netdev):off panic=5\0" \ 82 "flash_nfs=run nfsargs addip;" \ 83 "bootm $(kernel_addr)\0" \ 84 "flash_self=run ramargs addip;" \ 85 "bootm $(kernel_addr) $(ramdisk_addr)\0" \ 86 "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \ 87 "rootpath=/opt/eldk/ppc_6xx\0" \ 88 "bootfile=/tftpboot/munices/u-boot.bin\0" \ 89 "update=tftpboot 200000 ${bootfile};protect off fff00000 fff3ffff;" \ 90 "erase fff00000 fff3ffff; cp.b 200000 FFF00000 ${filesize}\0" \ 91 "" 92#define CONFIG_BOOTCOMMAND "run net_nfs" 93 94/* 95 * IPB Bus clocking configuration. 96 */ 97#define CONFIG_SYS_IPBSPEED_133 /* define for 133MHz speed */ 98#if defined(CONFIG_SYS_IPBSPEED_133) 99/* 100 * PCI Bus clocking configuration 101 * 102 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if 103 * CONFIG_SYS_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't 104 * been tested with a IPB Bus Clock of 66 MHz. 105 */ 106#define CONFIG_SYS_PCISPEED_66 /* define for 66MHz speed */ 107#else 108#undef CONFIG_SYS_PCISPEED_66 /* for 33MHz speed */ 109#endif 110 111/* 112 * Memory map 113 */ 114#define CONFIG_SYS_MBAR 0xF0000000 /* MBAR hast to be switched by other bootloader or debugger config */ 115 116#define CONFIG_SYS_DEFAULT_MBAR 0x80000000 117#define CONFIG_SYS_SDRAM_BASE 0x00000000 118/* Use SRAM until RAM will be available */ 119#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM 120#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */ 121#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 122#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 123 124#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 125#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) 126# define CONFIG_SYS_RAMBOOT 1 127#endif 128 129#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ 130#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ 131#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ 132 133/* 134 * Flash configuration 135 */ 136#define CONFIG_SYS_FLASH_BASE 0xFF000000 137#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */ 138#define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */ 139#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 140#define CONFIG_SYS_FLASH_EMPTY_INFO 141#define CONFIG_SYS_FLASH_SIZE 0x01000000 /* 16 MByte */ 142#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */ 143#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks (= chip selects) */ 144#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* not supported yet for AMD */ 145 146/* 147 * Chip selects configuration 148 */ 149/* Boot Chipselect */ 150#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE 151#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE 152#define CONFIG_SYS_BOOTCS_CFG 0x00047800 153 154/* 155 * Environment settings 156 */ 157#define CONFIG_ENV_IS_IN_FLASH 1 158#define CONFIG_ENV_OFFSET 0x40000 159#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + CONFIG_ENV_OFFSET) 160#define CONFIG_ENV_SECT_SIZE 0x20000 161#define CONFIG_ENV_SIZE 0x4000 162#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE) 163#define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_TEXT_BASE + CONFIG_ENV_OFFSET_REDUND) 164#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) 165#define CONFIG_ENV_OVERWRITE 1 166 167/* 168 * Ethernet configuration 169 */ 170#define CONFIG_MPC5xxx_FEC 1 171#define CONFIG_MPC5xxx_FEC_MII100 172#define CONFIG_PHY_ADDR 0x01 173#define CONFIG_MII 1 174 175/* 176 * GPIO configuration 177 */ 178#define CONFIG_SYS_GPS_PORT_CONFIG 0x00058044 /* PSC1=UART, PSC2=UART ; Ether=100MBit with MD 179 no PCI */ 180 181/* 182 * Miscellaneous configurable options 183 */ 184#define CONFIG_SYS_LONGHELP /* undef to save memory */ 185#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ 186#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 187#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 188#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 189#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 190 191#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ 192#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ 193 194#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */ 195#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ 196 197#define CONFIG_DISPLAY_BOARDINFO 1 198#define CONFIG_CMDLINE_EDITING 1 199 200/* 201 * Various low-level settings 202 */ 203#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI 204#define CONFIG_SYS_HID0_FINAL HID0_ICE 205 206#define CONFIG_SYS_CS_BURST 0x00000000 207#define CONFIG_SYS_CS_DEADCYCLE 0x33333333 208#define CONFIG_SYS_RESET_ADDRESS 0xff000000 209 210/* pass open firmware flat tree */ 211#define CONFIG_OF_LIBFDT 1 212#define CONFIG_OF_BOARD_SETUP 1 213 214#define OF_CPU "PowerPC,5200@0" 215#define OF_TBCLK (bd->bi_busfreq / 4) 216#define OF_SOC "soc5200@f0000000" 217#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000" 218 219#endif /* __CONFIG_H */ 220