1/* 2 * (C) Copyright 2000-2004 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24#ifndef _PCMCIA_H 25#define _PCMCIA_H 26 27#include <common.h> 28#include <config.h> 29 30/* 31 * Allow configuration to select PCMCIA slot, 32 * or try to generate a useful default 33 */ 34#if defined(CONFIG_CMD_PCMCIA) || \ 35 (defined(CONFIG_CMD_IDE) && \ 36 (defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT) ) ) 37 38#if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) 39 40 /* The RPX series use SLOT_B */ 41#if defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE) 42# define CONFIG_PCMCIA_SLOT_B 43#elif defined(CONFIG_ADS) /* The ADS board uses SLOT_A */ 44# define CONFIG_PCMCIA_SLOT_A 45#elif defined(CONFIG_FADS) /* The FADS series are a mess */ 46# if defined(CONFIG_MPC86x) || defined(CONFIG_MPC821) 47# define CONFIG_PCMCIA_SLOT_A 48# else 49# define CONFIG_PCMCIA_SLOT_B 50# endif 51#elif defined(CONFIG_TQM8xxL) || defined(CONFIG_SVM_SC8xx) 52# define CONFIG_PCMCIA_SLOT_B /* The TQM8xxL use SLOT_B */ 53#elif defined(CONFIG_SPD823TS) /* The SPD8xx use SLOT_B */ 54# define CONFIG_PCMCIA_SLOT_B 55#elif defined(CONFIG_IVMS8) || defined(CONFIG_IVML24) /* The IVM* use SLOT_A */ 56# define CONFIG_PCMCIA_SLOT_A 57#elif defined(CONFIG_LWMON) /* The LWMON use SLOT_B */ 58# define CONFIG_PCMCIA_SLOT_B 59#elif defined(CONFIG_ICU862) /* The ICU862 use SLOT_B */ 60# define CONFIG_PCMCIA_SLOT_B 61#elif defined(CONFIG_C2MON) /* The C2MON use SLOT_B */ 62# define CONFIG_PCMCIA_SLOT_B 63#elif defined(CONFIG_R360MPI) /* The R360MPI use SLOT_B */ 64# define CONFIG_PCMCIA_SLOT_B 65#elif defined(CONFIG_ATC) /* The ATC use SLOT_A */ 66# define CONFIG_PCMCIA_SLOT_A 67#elif defined(CONFIG_NETTA) 68# define CONFIG_PCMCIA_SLOT_A 69#elif defined(CONFIG_UC100) /* The UC100 use SLOT_B */ 70# define CONFIG_PCMCIA_SLOT_B 71#else 72# error "PCMCIA Slot not configured" 73#endif 74 75#endif /* !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) */ 76 77/* Make sure exactly one slot is defined - we support only one for now */ 78#if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) 79#error Neither CONFIG_PCMCIA_SLOT_A nor CONFIG_PCMCIA_SLOT_B configured 80#endif 81#if defined(CONFIG_PCMCIA_SLOT_A) && defined(CONFIG_PCMCIA_SLOT_B) 82#error Both CONFIG_PCMCIA_SLOT_A and CONFIG_PCMCIA_SLOT_B configured 83#endif 84 85#ifndef PCMCIA_SOCKETS_NO 86#define PCMCIA_SOCKETS_NO 1 87#endif 88#ifndef PCMCIA_MEM_WIN_NO 89#define PCMCIA_MEM_WIN_NO 4 90#endif 91#define PCMCIA_IO_WIN_NO 2 92 93/* define _slot_ to be able to optimize macros */ 94#ifdef CONFIG_PCMCIA_SLOT_A 95# define _slot_ 0 96# define PCMCIA_SLOT_MSG "slot A" 97# define PCMCIA_SLOT_x PCMCIA_PSLOT_A 98#else 99# define _slot_ 1 100# define PCMCIA_SLOT_MSG "slot B" 101# define PCMCIA_SLOT_x PCMCIA_PSLOT_B 102#endif 103 104/* 105 * The TQM850L hardware has two pins swapped! Grrrrgh! 106 */ 107#ifdef CONFIG_TQM850L 108#define __MY_PCMCIA_GCRX_CXRESET PCMCIA_GCRX_CXOE 109#define __MY_PCMCIA_GCRX_CXOE PCMCIA_GCRX_CXRESET 110#else 111#define __MY_PCMCIA_GCRX_CXRESET PCMCIA_GCRX_CXRESET 112#define __MY_PCMCIA_GCRX_CXOE PCMCIA_GCRX_CXOE 113#endif 114 115/* 116 * This structure is used to address each window in the PCMCIA controller. 117 * 118 * Keep in mind that we assume that pcmcia_win_t[n+1] is mapped directly 119 * after pcmcia_win_t[n]... 120 */ 121 122typedef struct { 123 ulong br; 124 ulong or; 125} pcmcia_win_t; 126 127/* 128 * Definitions for PCMCIA control registers to operate in IDE mode 129 * 130 * All timing related setup (PCMCIA_SHT, PCMCIA_SST, PCMCIA_SL) 131 * to be done later (depending on CPU clock) 132 */ 133 134/* Window 0: 135 * Base: 0xFE100000 CS1 136 * Port Size: 2 Bytes 137 * Port Size: 16 Bit 138 * Common Memory Space 139 */ 140 141#define CONFIG_SYS_PCMCIA_PBR0 0xFE100000 142#define CONFIG_SYS_PCMCIA_POR0 ( PCMCIA_BSIZE_2 \ 143 | PCMCIA_PPS_16 \ 144 | PCMCIA_PRS_MEM \ 145 | PCMCIA_SLOT_x \ 146 | PCMCIA_PV \ 147 ) 148 149/* Window 1: 150 * Base: 0xFE100080 CS1 151 * Port Size: 8 Bytes 152 * Port Size: 8 Bit 153 * Common Memory Space 154 */ 155 156#define CONFIG_SYS_PCMCIA_PBR1 0xFE100080 157#define CONFIG_SYS_PCMCIA_POR1 ( PCMCIA_BSIZE_8 \ 158 | PCMCIA_PPS_8 \ 159 | PCMCIA_PRS_MEM \ 160 | PCMCIA_SLOT_x \ 161 | PCMCIA_PV \ 162 ) 163 164/* Window 2: 165 * Base: 0xFE100100 CS2 166 * Port Size: 8 Bytes 167 * Port Size: 8 Bit 168 * Common Memory Space 169 */ 170 171#define CONFIG_SYS_PCMCIA_PBR2 0xFE100100 172#define CONFIG_SYS_PCMCIA_POR2 ( PCMCIA_BSIZE_8 \ 173 | PCMCIA_PPS_8 \ 174 | PCMCIA_PRS_MEM \ 175 | PCMCIA_SLOT_x \ 176 | PCMCIA_PV \ 177 ) 178 179/* Window 3: 180 * not used 181 */ 182#define CONFIG_SYS_PCMCIA_PBR3 0 183#define CONFIG_SYS_PCMCIA_POR3 0 184 185/* Window 4: 186 * Base: 0xFE100C00 CS1 187 * Port Size: 2 Bytes 188 * Port Size: 16 Bit 189 * Common Memory Space 190 */ 191 192#define CONFIG_SYS_PCMCIA_PBR4 0xFE100C00 193#define CONFIG_SYS_PCMCIA_POR4 ( PCMCIA_BSIZE_2 \ 194 | PCMCIA_PPS_16 \ 195 | PCMCIA_PRS_MEM \ 196 | PCMCIA_SLOT_x \ 197 | PCMCIA_PV \ 198 ) 199 200/* Window 5: 201 * Base: 0xFE100C80 CS1 202 * Port Size: 8 Bytes 203 * Port Size: 8 Bit 204 * Common Memory Space 205 */ 206 207#define CONFIG_SYS_PCMCIA_PBR5 0xFE100C80 208#define CONFIG_SYS_PCMCIA_POR5 ( PCMCIA_BSIZE_8 \ 209 | PCMCIA_PPS_8 \ 210 | PCMCIA_PRS_MEM \ 211 | PCMCIA_SLOT_x \ 212 | PCMCIA_PV \ 213 ) 214 215/* Window 6: 216 * Base: 0xFE100D00 CS2 217 * Port Size: 8 Bytes 218 * Port Size: 8 Bit 219 * Common Memory Space 220 */ 221 222#define CONFIG_SYS_PCMCIA_PBR6 0xFE100D00 223#define CONFIG_SYS_PCMCIA_POR6 ( PCMCIA_BSIZE_8 \ 224 | PCMCIA_PPS_8 \ 225 | PCMCIA_PRS_MEM \ 226 | PCMCIA_SLOT_x \ 227 | PCMCIA_PV \ 228 ) 229 230/* Window 7: 231 * not used 232 */ 233#define CONFIG_SYS_PCMCIA_PBR7 0 234#define CONFIG_SYS_PCMCIA_POR7 0 235 236/**********************************************************************/ 237 238/* 239 * CIS Tupel codes 240 */ 241#define CISTPL_NULL 0x00 242#define CISTPL_DEVICE 0x01 243#define CISTPL_LONGLINK_CB 0x02 244#define CISTPL_INDIRECT 0x03 245#define CISTPL_CONFIG_CB 0x04 246#define CISTPL_CFTABLE_ENTRY_CB 0x05 247#define CISTPL_LONGLINK_MFC 0x06 248#define CISTPL_BAR 0x07 249#define CISTPL_PWR_MGMNT 0x08 250#define CISTPL_EXTDEVICE 0x09 251#define CISTPL_CHECKSUM 0x10 252#define CISTPL_LONGLINK_A 0x11 253#define CISTPL_LONGLINK_C 0x12 254#define CISTPL_LINKTARGET 0x13 255#define CISTPL_NO_LINK 0x14 256#define CISTPL_VERS_1 0x15 257#define CISTPL_ALTSTR 0x16 258#define CISTPL_DEVICE_A 0x17 259#define CISTPL_JEDEC_C 0x18 260#define CISTPL_JEDEC_A 0x19 261#define CISTPL_CONFIG 0x1a 262#define CISTPL_CFTABLE_ENTRY 0x1b 263#define CISTPL_DEVICE_OC 0x1c 264#define CISTPL_DEVICE_OA 0x1d 265#define CISTPL_DEVICE_GEO 0x1e 266#define CISTPL_DEVICE_GEO_A 0x1f 267#define CISTPL_MANFID 0x20 268#define CISTPL_FUNCID 0x21 269#define CISTPL_FUNCE 0x22 270#define CISTPL_SWIL 0x23 271#define CISTPL_END 0xff 272 273/* 274 * CIS Function ID codes 275 */ 276#define CISTPL_FUNCID_MULTI 0x00 277#define CISTPL_FUNCID_MEMORY 0x01 278#define CISTPL_FUNCID_SERIAL 0x02 279#define CISTPL_FUNCID_PARALLEL 0x03 280#define CISTPL_FUNCID_FIXED 0x04 281#define CISTPL_FUNCID_VIDEO 0x05 282#define CISTPL_FUNCID_NETWORK 0x06 283#define CISTPL_FUNCID_AIMS 0x07 284#define CISTPL_FUNCID_SCSI 0x08 285 286/* 287 * Fixed Disk FUNCE codes 288 */ 289#define CISTPL_IDE_INTERFACE 0x01 290 291#define CISTPL_FUNCE_IDE_IFACE 0x01 292#define CISTPL_FUNCE_IDE_MASTER 0x02 293#define CISTPL_FUNCE_IDE_SLAVE 0x03 294 295/* First feature byte */ 296#define CISTPL_IDE_SILICON 0x04 297#define CISTPL_IDE_UNIQUE 0x08 298#define CISTPL_IDE_DUAL 0x10 299 300/* Second feature byte */ 301#define CISTPL_IDE_HAS_SLEEP 0x01 302#define CISTPL_IDE_HAS_STANDBY 0x02 303#define CISTPL_IDE_HAS_IDLE 0x04 304#define CISTPL_IDE_LOW_POWER 0x08 305#define CISTPL_IDE_REG_INHIBIT 0x10 306#define CISTPL_IDE_HAS_INDEX 0x20 307#define CISTPL_IDE_IOIS16 0x40 308 309#endif 310 311#ifdef CONFIG_8xx 312extern u_int *pcmcia_pgcrx[]; 313#define PCMCIA_PGCRX(slot) (*pcmcia_pgcrx[slot]) 314#endif 315 316#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD) \ 317 || defined(CONFIG_PXA_PCMCIA) 318extern int check_ide_device(int slot); 319#endif 320 321#endif /* _PCMCIA_H */ 322