LXR uboot/board/bf518f-ezbrd/bf518f-ezbrd.c

   1/*
   2 * U-boot - main board file
   3 *
   4 * Copyright (c) 2008-2009 Analog Devices Inc.
   5 *
   6 * Licensed under the GPL-2 or later.
   7 */
   8
   9#include <common.h>
  10#include <config.h>
  11#include <command.h>
  12#include <net.h>
  13#include <netdev.h>
  14#include <spi.h>
  15#include <asm/blackfin.h>
  16#include <asm/net.h>
  17#include <asm/portmux.h>
  18#include <asm/mach-common/bits/otp.h>
  19#include <asm/sdh.h>
  20
  21DECLARE_GLOBAL_DATA_PTR;
  22
  23int checkboard(void)
  24{
  25        printf("Board: ADI BF518F EZ-Board board\n");
  26        printf("       Support: http://blackfin.uclinux.org/\n");
  27        return 0;
  28}
  29
  30#if defined(CONFIG_BFIN_MAC)
  31static void board_init_enetaddr(uchar *mac_addr)
  32{
  33#ifdef CONFIG_SYS_NO_FLASH
  34# define USE_MAC_IN_FLASH 0
  35#else
  36# define USE_MAC_IN_FLASH 1
  37#endif
  38        bool valid_mac = false;
  39
  40        if (USE_MAC_IN_FLASH) {
  41                /* we cram the MAC in the last flash sector */
  42                uchar *board_mac_addr = (uchar *)0x203F0096;
  43                if (is_valid_ether_addr(board_mac_addr)) {
  44                        memcpy(mac_addr, board_mac_addr, 6);
  45                        valid_mac = true;
  46                }
  47        }
  48
  49        if (!valid_mac) {
  50                puts("Warning: Generating 'random' MAC address\n");
  51                bfin_gen_rand_mac(mac_addr);
  52        }
  53
  54        eth_setenv_enetaddr("ethaddr", mac_addr);
  55}
  56
  57/* Only the first run of boards had a KSZ switch */
  58#if defined(CONFIG_BFIN_SPI) && __SILICON_REVISION__ == 0
  59# define KSZ_POSSIBLE 1
  60#else
  61# define KSZ_POSSIBLE 0
  62#endif
  63
  64#define KSZ_MAX_HZ    5000000
  65
  66#define KSZ_WRITE     0x02
  67#define KSZ_READ      0x03
  68
  69#define KSZ_REG_CHID  0x00      /* Register 0: Chip ID0 */
  70#define KSZ_REG_STPID 0x01      /* Register 1: Chip ID1 / Start Switch */
  71#define KSZ_REG_GC9   0x0b      /* Register 11: Global Control 9 */
  72#define KSZ_REG_P3C0  0x30      /* Register 48: Port 3 Control 0 */
  73
  74static int ksz8893m_transfer(struct spi_slave *slave, uchar dir, uchar reg,
  75                             uchar data, uchar result[3])
  76{
  77        unsigned char dout[3] = { dir, reg, data, };
  78        return spi_xfer(slave, sizeof(dout) * 8, dout, result, SPI_XFER_BEGIN | SPI_XFER_END);
  79}
  80
  81static int ksz8893m_reg_set(struct spi_slave *slave, uchar reg, uchar data)
  82{
  83        unsigned char din[3];
  84        return ksz8893m_transfer(slave, KSZ_WRITE, reg, data, din);
  85}
  86
  87static int ksz8893m_reg_read(struct spi_slave *slave, uchar reg)
  88{
  89        int ret;
  90        unsigned char din[3];
  91        ret = ksz8893m_transfer(slave, KSZ_READ, reg, 0, din);
  92        return ret ? ret : din[2];
  93}
  94
  95static int ksz8893m_reg_clear(struct spi_slave *slave, uchar reg, uchar mask)
  96{
  97        return ksz8893m_reg_set(slave, reg, ksz8893m_reg_read(slave, reg) & mask);
  98}
  99
 100static int ksz8893m_reset(struct spi_slave *slave)
 101{
 102        int ret = 0;
 103
 104        /* Disable STPID mode */
 105        ret |= ksz8893m_reg_clear(slave, KSZ_REG_GC9, 0x01);
 106
 107        /* Disable VLAN tag insert on Port3 */
 108        ret |= ksz8893m_reg_clear(slave, KSZ_REG_P3C0, 0x04);
 109
 110        /* Start switch */
 111        ret |= ksz8893m_reg_set(slave, KSZ_REG_STPID, 0x01);
 112
 113        return ret;
 114}
 115
 116static bool board_ksz_init(void)
 117{
 118        static bool switch_is_alive = false;
 119
 120        if (!switch_is_alive) {
 121                struct spi_slave *slave = spi_setup_slave(0, 1, KSZ_MAX_HZ, SPI_MODE_3);
 122                if (slave) {
 123                        if (!spi_claim_bus(slave)) {
 124                                bool phy_is_ksz = (ksz8893m_reg_read(slave, KSZ_REG_CHID) == 0x88);
 125                                int ret = phy_is_ksz ? ksz8893m_reset(slave) : 0;
 126                                switch_is_alive = (ret == 0);
 127                                spi_release_bus(slave);
 128                        }
 129                        spi_free_slave(slave);
 130                }
 131        }
 132
 133        return switch_is_alive;
 134}
 135
 136int board_eth_init(bd_t *bis)
 137{
 138        if (KSZ_POSSIBLE) {
 139                if (!board_ksz_init())
 140                        return 0;
 141        }
 142        return bfin_EMAC_initialize(bis);
 143}
 144#endif
 145
 146int misc_init_r(void)
 147{
 148#ifdef CONFIG_BFIN_MAC
 149        uchar enetaddr[6];
 150        if (!eth_getenv_enetaddr("ethaddr", enetaddr))
 151                board_init_enetaddr(enetaddr);
 152#endif
 153
 154#ifndef CONFIG_SYS_NO_FLASH
 155        /* we use the last sector for the MAC address / POST LDR */
 156        extern flash_info_t flash_info[];
 157        flash_protect(FLAG_PROTECT_SET, 0x203F0000, 0x203FFFFF, &flash_info[0]);
 158#endif
 159
 160        return 0;
 161}
 162
 163int board_early_init_f(void)
 164{
 165        /* connect async banks by default */
 166        const unsigned short pins[] = {
 167                P_AMS2, P_AMS3, 0,
 168        };
 169        return peripheral_request_list(pins, "async");
 170}
 171
 172#ifdef CONFIG_BFIN_SDH
 173int board_mmc_init(bd_t *bis)
 174{
 175        return bfin_mmc_init(bis);
 176}
 177#endif
 178