LXR uboot/board/esd/vom405/vom405.c

   1/*
   2 * (C) Copyright 2001-2004
   3 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
   4 *
   5 * See file CREDITS for list of people who contributed to this
   6 * project.
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License as
  10 * published by the Free Software Foundation; either version 2 of
  11 * the License, or (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, write to the Free Software
  20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21 * MA 02111-1307 USA
  22 */
  23
  24#include <common.h>
  25#include <asm/processor.h>
  26#include <asm/io.h>
  27#include <command.h>
  28#include <malloc.h>
  29#include <sja1000.h>
  30
  31DECLARE_GLOBAL_DATA_PTR;
  32
  33extern void lxt971_no_sleep(void);
  34
  35/*
  36 * generate a short spike on the CAN tx line
  37 * to bring the couplers in sync
  38 */
  39void init_coupler(u32 addr)
  40{
  41        struct sja1000_basic_s *ctrl = (struct sja1000_basic_s *)addr;
  42
  43        /* reset */
  44        out_8(&ctrl->cr, CR_RR);
  45
  46        /* dominant */
  47        out_8(&ctrl->btr0, 0x00); /* btr setup is required */
  48        out_8(&ctrl->btr1, 0x14); /* we use 1Mbit/s */
  49        out_8(&ctrl->oc, OC_TP1 | OC_TN1 | OC_POL1 |
  50              OC_TP0 | OC_TN0 | OC_POL0 | OC_MODE1);
  51        out_8(&ctrl->cr, 0x00);
  52
  53        /* delay */
  54        in_8(&ctrl->cr);
  55        in_8(&ctrl->cr);
  56        in_8(&ctrl->cr);
  57        in_8(&ctrl->cr);
  58
  59        /* reset */
  60        out_8(&ctrl->cr, CR_RR);
  61}
  62
  63int board_early_init_f (void)
  64{
  65        /*
  66         * IRQ 0-15  405GP internally generated; active high; level sensitive
  67         * IRQ 16    405GP internally generated; active low; level sensitive
  68         * IRQ 17-24 RESERVED
  69         * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
  70         * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
  71         * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
  72         * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
  73         * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
  74         * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
  75         * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
  76         */
  77        mtdcr(UIC0SR, 0xFFFFFFFF);       /* clear all ints */
  78        mtdcr(UIC0ER, 0x00000000);       /* disable all ints */
  79        mtdcr(UIC0CR, 0x00000000);       /* set all to be non-critical*/
  80        mtdcr(UIC0PR, 0xFFFFFF80);       /* set int polarities */
  81        mtdcr(UIC0TR, 0x10000000);       /* set int trigger levels */
  82        mtdcr(UIC0VCR, 0x00000001);      /* set vect base=0,INT0 highest priority*/
  83        mtdcr(UIC0SR, 0xFFFFFFFF);       /* clear all ints */
  84
  85        /*
  86         * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
  87         */
  88        mtebc (EBC0_CFG, 0xa8400000); /* ebc always driven */
  89
  90        /*
  91         * Reset CPLD via GPIO12 (CS3) pin
  92         */
  93        out_be32((void *)GPIO0_OR,
  94                 in_be32((void *)GPIO0_OR) & ~(0x80000000 >> 12));
  95        udelay(1000); /* wait 1ms */
  96        out_be32((void *)GPIO0_OR,
  97                 in_be32((void *)GPIO0_OR) | (0x80000000 >> 12));
  98        udelay(1000); /* wait 1ms */
  99
 100        return 0;
 101}
 102
 103int misc_init_r (void)
 104{
 105        /* adjust flash start and offset */
 106        gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
 107        gd->bd->bi_flashoffset = 0;
 108
 109        /*
 110         * Init magnetic coupler
 111         */
 112        if (!getenv("noinitcoupler"))
 113                init_coupler(CAN_BA);
 114
 115        return (0);
 116}
 117
 118/*
 119 * Check Board Identity:
 120 */
 121int checkboard (void)
 122{
 123        char str[64];
 124        int i = getenv_f("serial#", str, sizeof(str));
 125        int flashcnt;
 126        int delay;
 127        u8 *led_reg = (u8 *)(CAN_BA + 0x1000);
 128
 129        puts ("Board: ");
 130
 131        if (i == -1) {
 132                puts ("### No HW ID - assuming VOM405");
 133        } else {
 134                puts(str);
 135        }
 136
 137        printf(" (PLD-Version=%02d)\n", in_8(led_reg));
 138
 139        /*
 140         * Flash LEDs
 141         */
 142        for (flashcnt = 0; flashcnt < 3; flashcnt++) {
 143                out_8(led_reg, 0x40);        /* LED_B..D off */
 144                for (delay = 0; delay < 100; delay++)
 145                        udelay(1000);
 146                out_8(led_reg, 0x47);        /* LED_B..D on */
 147                for (delay = 0; delay < 50; delay++)
 148                        udelay(1000);
 149        }
 150        out_8(led_reg, 0x40);
 151
 152        return 0;
 153}
 154
 155void reset_phy(void)
 156{
 157#ifdef CONFIG_LXT971_NO_SLEEP
 158
 159        /*
 160         * Disable sleep mode in LXT971
 161         */
 162        lxt971_no_sleep();
 163#endif
 164}
 165