LXR uboot/board/manroland/uc101/uc101.c

   1/*
   2 * (C) Copyright 2006
   3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
   4 *
   5 * (C) Copyright 2003-2004
   6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   7 *
   8 * (C) Copyright 2004
   9 * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
  10 *
  11 * (C) Copyright 2004
  12 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
  13 *
  14 * See file CREDITS for list of people who contributed to this
  15 * project.
  16 *
  17 * This program is free software; you can redistribute it and/or
  18 * modify it under the terms of the GNU General Public License as
  19 * published by the Free Software Foundation; either version 2 of
  20 * the License, or (at your option) any later version.
  21 *
  22 * This program is distributed in the hope that it will be useful,
  23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25 * GNU General Public License for more details.
  26 *
  27 * You should have received a copy of the GNU General Public License
  28 * along with this program; if not, write to the Free Software
  29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30 * MA 02111-1307 USA
  31 */
  32
  33#include <common.h>
  34#include <fdt_support.h>
  35#include <mpc5xxx.h>
  36#include <pci.h>
  37#include <malloc.h>
  38
  39/* some SIMPLE GPIO Pins */
  40#define GPIO_USB_8      (31-12)
  41#define GPIO_USB_7      (31-13)
  42#define GPIO_USB_6      (31-14)
  43#define GPIO_USB_0      (31-15)
  44#define GPIO_PSC3_7     (31-18)
  45#define GPIO_PSC3_6     (31-19)
  46#define GPIO_PSC3_1     (31-22)
  47#define GPIO_PSC3_0     (31-23)
  48
  49/* some simple Interrupt GPIO Pins */
  50#define GPIO_PSC3_8     2
  51#define GPIO_USB1_9     3
  52
  53#define GPT_OUT_0       0x00000027
  54#define GPT_OUT_1       0x00000037
  55#define GPT_DISABLE     0x00000000      /* GPT pin disabled */
  56
  57#define GP_SIMP_ENABLE_O(n, v) {pgpio->simple_dvo |= (v << n); \
  58                                pgpio->simple_ddr |= (1 << n); \
  59                                pgpio->simple_gpioe |= (1 << n); \
  60                                }
  61
  62#define GP_SIMP_ENABLE_I(n) {   pgpio->simple_ddr |= ~(1 << n); \
  63                                pgpio->simple_gpioe |= (1 << n); \
  64                                }
  65
  66#define GP_SIMP_SET_O(n, v)  (pgpio->simple_dvo = v ? \
  67                                (pgpio->simple_dvo | (1 << n)) : \
  68                                (pgpio->simple_dvo & ~(1 << n)) )
  69
  70#define GP_SIMP_GET_O(n)  ((pgpio->simple_dvo >> n) & 1)
  71#define GP_SIMP_GET_I(n)  ((pgpio->simple_ival >> n) & 1)
  72
  73#define GP_SINT_SET_O(n, v)  (pgpio->sint_dvo = v ? \
  74                                (pgpio->sint_dvo | (1 << n)) : \
  75                                (pgpio->sint_dvo & ~(1 << n)) )
  76
  77#define GP_SINT_ENABLE_O(n, v) {pgpio->sint_ode &= ~(1 << n); \
  78                                pgpio->sint_ddr |= (1 << n); \
  79                                GP_SINT_SET_O(n, v); \
  80                                pgpio->sint_gpioe |= (1 << n); \
  81                                }
  82
  83#define GP_SINT_ENABLE_I(n) {   pgpio->sint_ddr |= ~(1 << n); \
  84                                pgpio->sint_gpioe |= (1 << n); \
  85                                }
  86
  87#define GP_SINT_GET_O(n)  ((pgpio->sint_ival >> n) & 1)
  88#define GP_SINT_GET_I(n)  ((pgpio-ntt_ival >> n) & 1)
  89
  90#define GP_TIMER_ENABLE_O(n, v) ( \
  91        ((volatile struct mpc5xxx_gpt *)(MPC5XXX_GPT + n))->emsr = v ? \
  92                                GPT_OUT_1 : \
  93                                GPT_OUT_0 )
  94
  95#define GP_TIMER_SET_O(n, v)    GP_TIMER_ENABLE_O(n, v)
  96
  97#define GP_TIMER_GET_O(n, v) ( \
  98        (((volatile struct mpc5xxx_gpt *)(MPC5XXX_GPT + n))->emsr & 0x10) >> 4)
  99
 100#define GP_TIMER_GET_I(n, v) ( \
 101        (((volatile struct mpc5xxx_gpt *)(MPC5XXX_GPT + n))->sr & 0x100) >> 8)
 102
 103#ifndef CONFIG_SYS_RAMBOOT
 104static void sdram_start (int hi_addr)
 105{
 106        long hi_addr_bit = hi_addr ? 0x01000000 : 0;
 107
 108        /* unlock mode register */
 109        *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
 110        __asm__ volatile ("sync");
 111
 112        /* precharge all banks */
 113        *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
 114        __asm__ volatile ("sync");
 115
 116#if SDRAM_DDR
 117        /* set mode register: extended mode */
 118        *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
 119        __asm__ volatile ("sync");
 120
 121        /* set mode register: reset DLL */
 122        *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
 123        __asm__ volatile ("sync");
 124#endif
 125
 126        /* precharge all banks */
 127        *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
 128        __asm__ volatile ("sync");
 129
 130        /* auto refresh */
 131        *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
 132        __asm__ volatile ("sync");
 133
 134        /* set mode register */
 135        *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
 136        __asm__ volatile ("sync");
 137
 138        /* normal operation */
 139        *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
 140        __asm__ volatile ("sync");
 141}
 142#endif
 143
 144/*
 145 * ATTENTION: Although partially referenced initdram does NOT make real use
 146 *            use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE
 147 *            is something else than 0x00000000.
 148 */
 149
 150phys_size_t initdram (int board_type)
 151{
 152        ulong dramsize = 0;
 153#ifndef CONFIG_SYS_RAMBOOT
 154        ulong test1, test2;
 155
 156        /* setup SDRAM chip selects */
 157        *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001c; /* 512MB at 0x0 */
 158        *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x40000000; /* disabled */
 159        __asm__ volatile ("sync");
 160
 161        /* setup config registers */
 162        *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
 163        *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
 164        __asm__ volatile ("sync");
 165
 166#if SDRAM_DDR
 167        /* set tap delay */
 168        *(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
 169        __asm__ volatile ("sync");
 170#endif
 171
 172        /* find RAM size using SDRAM CS0 only */
 173        sdram_start(0);
 174        test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x20000000);
 175        sdram_start(1);
 176        test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x20000000);
 177        if (test1 > test2) {
 178                sdram_start(0);
 179                dramsize = test1;
 180        } else {
 181                dramsize = test2;
 182        }
 183
 184        /* memory smaller than 1MB is impossible */
 185        if (dramsize < (1 << 20)) {
 186                dramsize = 0;
 187        }
 188
 189        /* set SDRAM CS0 size according to the amount of RAM found */
 190        if (dramsize > 0) {
 191                *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
 192                        __builtin_ffs(dramsize >> 20) - 1;
 193        } else {
 194                *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
 195        }
 196
 197        *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
 198#else /* CONFIG_SYS_RAMBOOT */
 199
 200        /* retrieve size of memory connected to SDRAM CS0 */
 201        dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
 202        if (dramsize >= 0x13) {
 203                dramsize = (1 << (dramsize - 0x13)) << 20;
 204        } else {
 205                dramsize = 0;
 206        }
 207
 208        /* retrieve size of memory connected to SDRAM CS1 */
 209        dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
 210        if (dramsize2 >= 0x13) {
 211                dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
 212        } else {
 213                dramsize2 = 0;
 214        }
 215
 216#endif /* CONFIG_SYS_RAMBOOT */
 217
 218/*      return dramsize + dramsize2; */
 219        return dramsize;
 220}
 221
 222int checkboard (void)
 223{
 224        puts ("Board: MAN UC101\n");
 225        /* clear the Display */
 226        *(char *)(CONFIG_SYS_DISP_CWORD) = 0x80;
 227        return 0;
 228}
 229
 230static void init_ports (void)
 231{
 232        volatile struct mpc5xxx_gpio *pgpio =
 233                (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
 234
 235        GP_SIMP_ENABLE_I(GPIO_USB_8);   /* HEX Bit 3 */
 236        GP_SIMP_ENABLE_I(GPIO_USB_7);   /* HEX Bit 2 */
 237        GP_SIMP_ENABLE_I(GPIO_USB_6);   /* HEX Bit 1 */
 238        GP_SIMP_ENABLE_I(GPIO_USB_0);   /* HEX Bit 0 */
 239        GP_SIMP_ENABLE_I(GPIO_PSC3_0);  /* Switch Menue A */
 240        GP_SIMP_ENABLE_I(GPIO_PSC3_1);  /* Switch Menue B */
 241        GP_SIMP_ENABLE_I(GPIO_PSC3_6);  /* Switch Cold_Warm */
 242        GP_SIMP_ENABLE_I(GPIO_PSC3_7);  /* Switch Restart */
 243        GP_SINT_ENABLE_O(GPIO_PSC3_8, 0);       /* LED H2 */
 244        GP_SINT_ENABLE_O(GPIO_USB1_9, 0);       /* LED H3 */
 245        GP_TIMER_ENABLE_O(4, 0);        /* LED H4 */
 246        GP_TIMER_ENABLE_O(5, 0);        /* LED H5 */
 247        GP_TIMER_ENABLE_O(3, 0);        /* LED HB */
 248        GP_TIMER_ENABLE_O(1, 0);        /* RES_COLDSTART */
 249}
 250
 251#ifdef CONFIG_PREBOOT
 252
 253static uchar kbd_magic_prefix[]         = "key_magic";
 254static uchar kbd_command_prefix[]       = "key_cmd";
 255
 256struct kbd_data_t {
 257        char s1;
 258};
 259
 260struct kbd_data_t* get_keys (struct kbd_data_t *kbd_data)
 261{
 262        volatile struct mpc5xxx_gpio *pgpio =
 263                (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
 264
 265        kbd_data->s1 = GP_SIMP_GET_I(GPIO_USB_8) << 3 | \
 266                        GP_SIMP_GET_I(GPIO_USB_7) << 2 | \
 267                        GP_SIMP_GET_I(GPIO_USB_6) << 1 | \
 268                        GP_SIMP_GET_I(GPIO_USB_0) << 0;
 269        return kbd_data;
 270}
 271
 272static int compare_magic (const struct kbd_data_t *kbd_data, char *str)
 273{
 274        char s1 = str[0];
 275
 276        if (s1 >= '0' && s1 <= '9')
 277                s1 -= '0';
 278        else if (s1 >= 'a' && s1 <= 'f')
 279                s1 = s1 - 'a' + 10;
 280        else if (s1 >= 'A' && s1 <= 'F')
 281                s1 = s1 - 'A' + 10;
 282        else
 283                return -1;
 284
 285        if (s1 != kbd_data->s1) return -1;
 286        return 0;
 287}
 288
 289static char *key_match (const struct kbd_data_t *kbd_data)
 290{
 291        char magic[sizeof (kbd_magic_prefix) + 1];
 292        char *suffix;
 293        char *kbd_magic_keys;
 294
 295        /*
 296         * The following string defines the characters that can be appended
 297         * to "key_magic" to form the names of environment variables that
 298         * hold "magic" key codes, i. e. such key codes that can cause
 299         * pre-boot actions. If the string is empty (""), then only
 300         * "key_magic" is checked (old behaviour); the string "125" causes
 301         * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
 302         */
 303        if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
 304                kbd_magic_keys = "";
 305
 306        /* loop over all magic keys;
 307         * use '\0' suffix in case of empty string
 308         */
 309        for (suffix = kbd_magic_keys; *suffix ||
 310                     suffix == kbd_magic_keys; ++suffix) {
 311                sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
 312
 313                if (compare_magic(kbd_data, getenv(magic)) == 0) {
 314                        char cmd_name[sizeof (kbd_command_prefix) + 1];
 315                        char *cmd;
 316
 317                        sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
 318                        cmd = getenv (cmd_name);
 319
 320                        return (cmd);
 321                }
 322        }
 323
 324        return (NULL);
 325}
 326
 327#endif /* CONFIG_PREBOOT */
 328
 329int misc_init_r (void)
 330{
 331        /* Init the I/O ports */
 332        init_ports ();
 333
 334#ifdef CONFIG_PREBOOT
 335        struct kbd_data_t kbd_data;
 336        /* Decode keys */
 337        char *str = strdup (key_match (get_keys (&kbd_data)));
 338        /* Set or delete definition */
 339        setenv ("preboot", str);
 340        free (str);
 341#endif /* CONFIG_PREBOOT */
 342        return 0;
 343}
 344
 345int board_early_init_r (void)
 346{
 347        *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
 348        *(vu_long *)MPC5XXX_BOOTCS_START =
 349        *(vu_long *)MPC5XXX_CS0_START = START_REG(CONFIG_SYS_FLASH_BASE);
 350        *(vu_long *)MPC5XXX_BOOTCS_STOP =
 351        *(vu_long *)MPC5XXX_CS0_STOP = STOP_REG(CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_SIZE);
 352        /* Interbus enable it here ?? */
 353        *(vu_long *)MPC5XXX_GPT6_ENABLE = GPT_OUT_1;
 354        return 0;
 355}
 356#ifdef  CONFIG_PCI
 357static struct pci_controller hose;
 358
 359extern void pci_mpc5xxx_init(struct pci_controller *);
 360
 361void pci_init_board(void)
 362{
 363        pci_mpc5xxx_init(&hose);
 364}
 365#endif
 366
 367#if defined(CONFIG_HW_WATCHDOG)
 368void hw_watchdog_reset(void)
 369{
 370        /* Trigger HW Watchdog with TIMER_0 */
 371        *(vu_long *)MPC5XXX_GPT0_ENABLE = GPT_OUT_1;
 372        *(vu_long *)MPC5XXX_GPT0_ENABLE = GPT_OUT_0;
 373}
 374#endif
 375
 376#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
 377void ft_board_setup(void *blob, bd_t *bd)
 378{
 379        ft_cpu_setup(blob, bd);
 380}
 381#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
 382