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24#include <common.h>
25#include "musb_hcd.h"
26
27
28#define USB_MSC_BBB_RESET 0xFF
29#define USB_MSC_BBB_GET_MAX_LUN 0xFE
30
31
32static const struct musb_epinfo epinfo[3] = {
33 {MUSB_BULK_EP, 1, 512},
34 {MUSB_BULK_EP, 0, 512},
35 {MUSB_INTR_EP, 0, 64}
36};
37
38
39#ifdef MUSB_NO_MULTIPOINT
40static int rh_devnum;
41static u32 port_status;
42
43
44static const u8 root_hub_dev_des[] = {
45 0x12,
46 0x01,
47 0x00,
48 0x02,
49 0x09,
50 0x00,
51 0x00,
52 0x08,
53 0x00,
54 0x00,
55 0x00,
56 0x00,
57 0x00,
58 0x00,
59 0x00,
60 0x01,
61 0x00,
62 0x01
63};
64
65
66static const u8 root_hub_config_des[] = {
67 0x09,
68 0x02,
69 0x19,
70 0x00,
71 0x01,
72 0x01,
73 0x00,
74 0x40,
75
76 0x00,
77
78
79 0x09,
80 0x04,
81 0x00,
82 0x00,
83 0x01,
84 0x09,
85 0x00,
86 0x00,
87 0x00,
88
89
90 0x07,
91 0x05,
92 0x81,
93 0x03,
94 0x00,
95 0x02,
96 0xff
97};
98
99static const unsigned char root_hub_str_index0[] = {
100 0x04,
101 0x03,
102 0x09,
103 0x04,
104};
105
106static const unsigned char root_hub_str_index1[] = {
107 0x1c,
108 0x03,
109 'M',
110 0,
111 'U',
112 0,
113 'S',
114 0,
115 'B',
116 0,
117 ' ',
118 0,
119 'R',
120 0,
121 'o',
122 0,
123 'o',
124 0,
125 't',
126 0,
127 ' ',
128 0,
129 'H',
130 0,
131 'u',
132 0,
133 'b',
134 0,
135};
136#endif
137
138
139
140
141static void write_toggle(struct usb_device *dev, u8 ep, u8 dir_out)
142{
143 u16 toggle = usb_gettoggle(dev, ep, dir_out);
144 u16 csr;
145
146 if (dir_out) {
147 csr = readw(&musbr->txcsr);
148 if (!toggle) {
149 if (csr & MUSB_TXCSR_MODE)
150 csr = MUSB_TXCSR_CLRDATATOG;
151 else
152 csr = 0;
153 writew(csr, &musbr->txcsr);
154 } else {
155 csr |= MUSB_TXCSR_H_WR_DATATOGGLE;
156 writew(csr, &musbr->txcsr);
157 csr |= (toggle << MUSB_TXCSR_H_DATATOGGLE_SHIFT);
158 writew(csr, &musbr->txcsr);
159 }
160 } else {
161 if (!toggle) {
162 csr = readw(&musbr->txcsr);
163 if (csr & MUSB_TXCSR_MODE)
164 csr = MUSB_RXCSR_CLRDATATOG;
165 else
166 csr = 0;
167 writew(csr, &musbr->rxcsr);
168 } else {
169 csr = readw(&musbr->rxcsr);
170 csr |= MUSB_RXCSR_H_WR_DATATOGGLE;
171 writew(csr, &musbr->rxcsr);
172 csr |= (toggle << MUSB_S_RXCSR_H_DATATOGGLE);
173 writew(csr, &musbr->rxcsr);
174 }
175 }
176}
177
178
179
180
181
182
183static u8 check_stall(u8 ep, u8 dir_out)
184{
185 u16 csr;
186
187
188 if (!ep) {
189 csr = readw(&musbr->txcsr);
190 if (csr & MUSB_CSR0_H_RXSTALL) {
191 csr &= ~MUSB_CSR0_H_RXSTALL;
192 writew(csr, &musbr->txcsr);
193 return 1;
194 }
195 } else {
196 if (dir_out) {
197 csr = readw(&musbr->txcsr);
198 if (csr & MUSB_TXCSR_H_RXSTALL) {
199 csr &= ~MUSB_TXCSR_H_RXSTALL;
200 writew(csr, &musbr->txcsr);
201 return 1;
202 }
203 } else {
204 csr = readw(&musbr->rxcsr);
205 if (csr & MUSB_RXCSR_H_RXSTALL) {
206 csr &= ~MUSB_RXCSR_H_RXSTALL;
207 writew(csr, &musbr->rxcsr);
208 return 1;
209 }
210 }
211 }
212 return 0;
213}
214
215
216
217
218
219static int wait_until_ep0_ready(struct usb_device *dev, u32 bit_mask)
220{
221 u16 csr;
222 int result = 1;
223 int timeout = CONFIG_MUSB_TIMEOUT;
224
225 while (result > 0) {
226 csr = readw(&musbr->txcsr);
227 if (csr & MUSB_CSR0_H_ERROR) {
228 csr &= ~MUSB_CSR0_H_ERROR;
229 writew(csr, &musbr->txcsr);
230 dev->status = USB_ST_CRC_ERR;
231 result = -1;
232 break;
233 }
234
235 switch (bit_mask) {
236 case MUSB_CSR0_TXPKTRDY:
237 if (!(csr & MUSB_CSR0_TXPKTRDY)) {
238 if (check_stall(MUSB_CONTROL_EP, 0)) {
239 dev->status = USB_ST_STALLED;
240 result = -2;
241 } else
242 result = 0;
243 }
244 break;
245
246 case MUSB_CSR0_RXPKTRDY:
247 if (check_stall(MUSB_CONTROL_EP, 0)) {
248 dev->status = USB_ST_STALLED;
249 result = -2;
250 } else
251 if (csr & MUSB_CSR0_RXPKTRDY)
252 result = 0;
253 break;
254
255 case MUSB_CSR0_H_REQPKT:
256 if (!(csr & MUSB_CSR0_H_REQPKT)) {
257 if (check_stall(MUSB_CONTROL_EP, 0)) {
258 dev->status = USB_ST_STALLED;
259 result = -2;
260 } else
261 result = 0;
262 }
263 break;
264 }
265
266
267 if (--timeout)
268 udelay(1);
269 else {
270 dev->status = USB_ST_CRC_ERR;
271 result = -1;
272 break;
273 }
274 }
275
276 return result;
277}
278
279
280
281
282static u8 wait_until_txep_ready(struct usb_device *dev, u8 ep)
283{
284 u16 csr;
285 int timeout = CONFIG_MUSB_TIMEOUT;
286
287 do {
288 if (check_stall(ep, 1)) {
289 dev->status = USB_ST_STALLED;
290 return 0;
291 }
292
293 csr = readw(&musbr->txcsr);
294 if (csr & MUSB_TXCSR_H_ERROR) {
295 dev->status = USB_ST_CRC_ERR;
296 return 0;
297 }
298
299
300 if (--timeout)
301 udelay(1);
302 else {
303 dev->status = USB_ST_CRC_ERR;
304 return -1;
305 }
306
307 } while (csr & MUSB_TXCSR_TXPKTRDY);
308 return 1;
309}
310
311
312
313
314static u8 wait_until_rxep_ready(struct usb_device *dev, u8 ep)
315{
316 u16 csr;
317 int timeout = CONFIG_MUSB_TIMEOUT;
318
319 do {
320 if (check_stall(ep, 0)) {
321 dev->status = USB_ST_STALLED;
322 return 0;
323 }
324
325 csr = readw(&musbr->rxcsr);
326 if (csr & MUSB_RXCSR_H_ERROR) {
327 dev->status = USB_ST_CRC_ERR;
328 return 0;
329 }
330
331
332 if (--timeout)
333 udelay(1);
334 else {
335 dev->status = USB_ST_CRC_ERR;
336 return -1;
337 }
338
339 } while (!(csr & MUSB_RXCSR_RXPKTRDY));
340 return 1;
341}
342
343
344
345
346static int ctrlreq_setup_phase(struct usb_device *dev, struct devrequest *setup)
347{
348 int result;
349 u16 csr;
350
351
352 write_fifo(MUSB_CONTROL_EP, sizeof(struct devrequest), (void *)setup);
353
354
355 csr = readw(&musbr->txcsr);
356 csr |= (MUSB_CSR0_TXPKTRDY|MUSB_CSR0_H_SETUPPKT);
357 writew(csr, &musbr->txcsr);
358
359
360 result = wait_until_ep0_ready(dev, MUSB_CSR0_TXPKTRDY);
361 dev->act_len = 0;
362 return result;
363}
364
365
366
367
368static int ctrlreq_in_data_phase(struct usb_device *dev, u32 len, void *buffer)
369{
370 u16 csr;
371 u32 rxlen = 0;
372 u32 nextlen = 0;
373 u8 maxpktsize = (1 << dev->maxpacketsize) * 8;
374 u8 *rxbuff = (u8 *)buffer;
375 u8 rxedlength;
376 int result;
377
378 while (rxlen < len) {
379
380 nextlen = ((len-rxlen) > maxpktsize) ? maxpktsize : (len-rxlen);
381
382
383 csr = readw(&musbr->txcsr);
384 writew(csr | MUSB_CSR0_H_REQPKT, &musbr->txcsr);
385 result = wait_until_ep0_ready(dev, MUSB_CSR0_RXPKTRDY);
386 if (result < 0)
387 return result;
388
389
390 rxedlength = readb(&musbr->rxcount);
391
392
393 read_fifo(MUSB_CONTROL_EP, rxedlength, &rxbuff[rxlen]);
394
395
396 csr = readw(&musbr->txcsr);
397 csr &= ~MUSB_CSR0_RXPKTRDY;
398 writew(csr, &musbr->txcsr);
399
400
401 if (rxedlength != nextlen) {
402 dev->act_len += rxedlength;
403 break;
404 }
405 rxlen += nextlen;
406 dev->act_len = rxlen;
407 }
408 return 0;
409}
410
411
412
413
414static int ctrlreq_out_data_phase(struct usb_device *dev, u32 len, void *buffer)
415{
416 u16 csr;
417 u32 txlen = 0;
418 u32 nextlen = 0;
419 u8 maxpktsize = (1 << dev->maxpacketsize) * 8;
420 u8 *txbuff = (u8 *)buffer;
421 int result = 0;
422
423 while (txlen < len) {
424
425 nextlen = ((len-txlen) > maxpktsize) ? maxpktsize : (len-txlen);
426
427
428 write_fifo(MUSB_CONTROL_EP, txlen, &txbuff[txlen]);
429
430
431 csr = readw(&musbr->txcsr);
432 writew(csr | MUSB_CSR0_H_DIS_PING | MUSB_CSR0_TXPKTRDY,
433 &musbr->txcsr);
434 result = wait_until_ep0_ready(dev, MUSB_CSR0_TXPKTRDY);
435 if (result < 0)
436 break;
437
438 txlen += nextlen;
439 dev->act_len = txlen;
440 }
441 return result;
442}
443
444
445
446
447static int ctrlreq_out_status_phase(struct usb_device *dev)
448{
449 u16 csr;
450 int result;
451
452
453 csr = readw(&musbr->txcsr);
454 csr |= (MUSB_CSR0_H_DIS_PING | MUSB_CSR0_TXPKTRDY |
455 MUSB_CSR0_H_STATUSPKT);
456 writew(csr, &musbr->txcsr);
457
458
459 result = wait_until_ep0_ready(dev, MUSB_CSR0_TXPKTRDY);
460 return result;
461}
462
463
464
465
466static int ctrlreq_in_status_phase(struct usb_device *dev)
467{
468 u16 csr;
469 int result;
470
471
472 csr = MUSB_CSR0_H_DIS_PING | MUSB_CSR0_H_REQPKT | MUSB_CSR0_H_STATUSPKT;
473 writew(csr, &musbr->txcsr);
474 result = wait_until_ep0_ready(dev, MUSB_CSR0_H_REQPKT);
475
476
477 csr = readw(&musbr->txcsr);
478 csr &= ~(MUSB_CSR0_RXPKTRDY | MUSB_CSR0_H_STATUSPKT);
479 writew(csr, &musbr->txcsr);
480 return result;
481}
482
483
484
485
486static u8 get_dev_speed(struct usb_device *dev)
487{
488 return (dev->speed & USB_SPEED_HIGH) ? MUSB_TYPE_SPEED_HIGH :
489 ((dev->speed & USB_SPEED_LOW) ? MUSB_TYPE_SPEED_LOW :
490 MUSB_TYPE_SPEED_FULL);
491}
492
493
494
495
496static void config_hub_port(struct usb_device *dev, u8 ep)
497{
498 u8 chid;
499 u8 hub;
500
501
502 while (dev->parent->parent != NULL)
503 if (get_dev_speed(dev->parent) != MUSB_TYPE_SPEED_HIGH)
504 dev = dev->parent;
505 else
506 break;
507
508
509 hub = dev->parent->devnum;
510 for (chid = 0; chid < USB_MAXCHILDREN; chid++)
511 if (dev->parent->children[chid] == dev)
512 break;
513
514#ifndef MUSB_NO_MULTIPOINT
515
516 writeb(hub, &musbr->tar[ep].txhubaddr);
517 writeb((chid + 1), &musbr->tar[ep].txhubport);
518 writeb(hub, &musbr->tar[ep].rxhubaddr);
519 writeb((chid + 1), &musbr->tar[ep].rxhubport);
520#endif
521}
522
523#ifdef MUSB_NO_MULTIPOINT
524
525static void musb_port_reset(int do_reset)
526{
527 u8 power = readb(&musbr->power);
528
529 if (do_reset) {
530 power &= 0xf0;
531 writeb(power | MUSB_POWER_RESET, &musbr->power);
532 port_status |= USB_PORT_STAT_RESET;
533 port_status &= ~USB_PORT_STAT_ENABLE;
534 udelay(30000);
535 } else {
536 writeb(power & ~MUSB_POWER_RESET, &musbr->power);
537
538 power = readb(&musbr->power);
539 if (power & MUSB_POWER_HSMODE)
540 port_status |= USB_PORT_STAT_HIGH_SPEED;
541
542 port_status &= ~(USB_PORT_STAT_RESET | (USB_PORT_STAT_C_CONNECTION << 16));
543 port_status |= USB_PORT_STAT_ENABLE
544 | (USB_PORT_STAT_C_RESET << 16)
545 | (USB_PORT_STAT_C_ENABLE << 16);
546 }
547}
548
549
550
551
552static int musb_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
553 void *buffer, int transfer_len,
554 struct devrequest *cmd)
555{
556 int leni = transfer_len;
557 int len = 0;
558 int stat = 0;
559 u32 datab[4];
560 const u8 *data_buf = (u8 *) datab;
561 u16 bmRType_bReq;
562 u16 wValue;
563 u16 wIndex;
564 u16 wLength;
565 u16 int_usb;
566
567 if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
568 debug("Root-Hub submit IRQ: NOT implemented\n");
569 return 0;
570 }
571
572 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
573 wValue = swap_16(cmd->value);
574 wIndex = swap_16(cmd->index);
575 wLength = swap_16(cmd->length);
576
577 debug("--- HUB ----------------------------------------\n");
578 debug("submit rh urb, req=%x val=%#x index=%#x len=%d\n",
579 bmRType_bReq, wValue, wIndex, wLength);
580 debug("------------------------------------------------\n");
581
582 switch (bmRType_bReq) {
583 case RH_GET_STATUS:
584 debug("RH_GET_STATUS\n");
585
586 *(__u16 *) data_buf = swap_16(1);
587 len = 2;
588 break;
589
590 case RH_GET_STATUS | RH_INTERFACE:
591 debug("RH_GET_STATUS | RH_INTERFACE\n");
592
593 *(__u16 *) data_buf = swap_16(0);
594 len = 2;
595 break;
596
597 case RH_GET_STATUS | RH_ENDPOINT:
598 debug("RH_GET_STATUS | RH_ENDPOINT\n");
599
600 *(__u16 *) data_buf = swap_16(0);
601 len = 2;
602 break;
603
604 case RH_GET_STATUS | RH_CLASS:
605 debug("RH_GET_STATUS | RH_CLASS\n");
606
607 *(__u32 *) data_buf = swap_32(0);
608 len = 4;
609 break;
610
611 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
612 debug("RH_GET_STATUS | RH_OTHER | RH_CLASS\n");
613
614 int_usb = readw(&musbr->intrusb);
615 if (int_usb & MUSB_INTR_CONNECT) {
616 port_status |= USB_PORT_STAT_CONNECTION
617 | (USB_PORT_STAT_C_CONNECTION << 16);
618 port_status |= USB_PORT_STAT_HIGH_SPEED
619 | USB_PORT_STAT_ENABLE;
620 }
621
622 if (port_status & USB_PORT_STAT_RESET)
623 musb_port_reset(0);
624
625 *(__u32 *) data_buf = swap_32(port_status);
626 len = 4;
627 break;
628
629 case RH_CLEAR_FEATURE | RH_ENDPOINT:
630 debug("RH_CLEAR_FEATURE | RH_ENDPOINT\n");
631
632 switch (wValue) {
633 case RH_ENDPOINT_STALL:
634 debug("C_HUB_ENDPOINT_STALL\n");
635 len = 0;
636 break;
637 }
638 port_status &= ~(1 << wValue);
639 break;
640
641 case RH_CLEAR_FEATURE | RH_CLASS:
642 debug("RH_CLEAR_FEATURE | RH_CLASS\n");
643
644 switch (wValue) {
645 case RH_C_HUB_LOCAL_POWER:
646 debug("C_HUB_LOCAL_POWER\n");
647 len = 0;
648 break;
649
650 case RH_C_HUB_OVER_CURRENT:
651 debug("C_HUB_OVER_CURRENT\n");
652 len = 0;
653 break;
654 }
655 port_status &= ~(1 << wValue);
656 break;
657
658 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
659 debug("RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS\n");
660
661 switch (wValue) {
662 case RH_PORT_ENABLE:
663 len = 0;
664 break;
665
666 case RH_PORT_SUSPEND:
667 len = 0;
668 break;
669
670 case RH_PORT_POWER:
671 len = 0;
672 break;
673
674 case RH_C_PORT_CONNECTION:
675 len = 0;
676 break;
677
678 case RH_C_PORT_ENABLE:
679 len = 0;
680 break;
681
682 case RH_C_PORT_SUSPEND:
683 len = 0;
684 break;
685
686 case RH_C_PORT_OVER_CURRENT:
687 len = 0;
688 break;
689
690 case RH_C_PORT_RESET:
691 len = 0;
692 break;
693
694 default:
695 debug("invalid wValue\n");
696 stat = USB_ST_STALLED;
697 }
698
699 port_status &= ~(1 << wValue);
700 break;
701
702 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
703 debug("RH_SET_FEATURE | RH_OTHER | RH_CLASS\n");
704
705 switch (wValue) {
706 case RH_PORT_SUSPEND:
707 len = 0;
708 break;
709
710 case RH_PORT_RESET:
711 musb_port_reset(1);
712 len = 0;
713 break;
714
715 case RH_PORT_POWER:
716 len = 0;
717 break;
718
719 case RH_PORT_ENABLE:
720 len = 0;
721 break;
722
723 default:
724 debug("invalid wValue\n");
725 stat = USB_ST_STALLED;
726 }
727
728 port_status |= 1 << wValue;
729 break;
730
731 case RH_SET_ADDRESS:
732 debug("RH_SET_ADDRESS\n");
733
734 rh_devnum = wValue;
735 len = 0;
736 break;
737
738 case RH_GET_DESCRIPTOR:
739 debug("RH_GET_DESCRIPTOR: %x, %d\n", wValue, wLength);
740
741 switch (wValue) {
742 case (USB_DT_DEVICE << 8):
743 len = min_t(unsigned int,
744 leni, min_t(unsigned int,
745 sizeof(root_hub_dev_des),
746 wLength));
747 data_buf = root_hub_dev_des;
748 break;
749
750 case (USB_DT_CONFIG << 8):
751 len = min_t(unsigned int,
752 leni, min_t(unsigned int,
753 sizeof(root_hub_config_des),
754 wLength));
755 data_buf = root_hub_config_des;
756 break;
757
758 case ((USB_DT_STRING << 8) | 0x00):
759 len = min_t(unsigned int,
760 leni, min_t(unsigned int,
761 sizeof(root_hub_str_index0),
762 wLength));
763 data_buf = root_hub_str_index0;
764 break;
765
766 case ((USB_DT_STRING << 8) | 0x01):
767 len = min_t(unsigned int,
768 leni, min_t(unsigned int,
769 sizeof(root_hub_str_index1),
770 wLength));
771 data_buf = root_hub_str_index1;
772 break;
773
774 default:
775 debug("invalid wValue\n");
776 stat = USB_ST_STALLED;
777 }
778
779 break;
780
781 case RH_GET_DESCRIPTOR | RH_CLASS: {
782 u8 *_data_buf = (u8 *) datab;
783 debug("RH_GET_DESCRIPTOR | RH_CLASS\n");
784
785 _data_buf[0] = 0x09;
786 _data_buf[1] = 0x29;
787 _data_buf[2] = 0x1;
788 _data_buf[3] = 0x01;
789 _data_buf[3] |= 0x10;
790
791
792 _data_buf[4] = 0;
793 _data_buf[5] = 5;
794 _data_buf[6] = 0;
795 _data_buf[7] = 0x02;
796 _data_buf[8] = 0xff;
797
798 len = min_t(unsigned int, leni,
799 min_t(unsigned int, data_buf[0], wLength));
800 break;
801 }
802
803 case RH_GET_CONFIGURATION:
804 debug("RH_GET_CONFIGURATION\n");
805
806 *(__u8 *) data_buf = 0x01;
807 len = 1;
808 break;
809
810 case RH_SET_CONFIGURATION:
811 debug("RH_SET_CONFIGURATION\n");
812
813 len = 0;
814 break;
815
816 default:
817 debug("*** *** *** unsupported root hub command *** *** ***\n");
818 stat = USB_ST_STALLED;
819 }
820
821 len = min_t(int, len, leni);
822 if (buffer != data_buf)
823 memcpy(buffer, data_buf, len);
824
825 dev->act_len = len;
826 dev->status = stat;
827 debug("dev act_len %d, status %d\n", dev->act_len, dev->status);
828
829 return stat;
830}
831
832static void musb_rh_init(void)
833{
834 rh_devnum = 0;
835 port_status = 0;
836}
837
838#else
839
840static void musb_rh_init(void) {}
841
842#endif
843
844
845
846
847int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
848 int len, struct devrequest *setup)
849{
850 int devnum = usb_pipedevice(pipe);
851 u16 csr;
852 u8 devspeed;
853
854#ifdef MUSB_NO_MULTIPOINT
855
856 if (devnum == rh_devnum) {
857 int stat = musb_submit_rh_msg(dev, pipe, buffer, len, setup);
858 if (stat)
859 return stat;
860 }
861#endif
862
863
864 writeb(MUSB_CONTROL_EP, &musbr->index);
865 csr = readw(&musbr->txcsr);
866
867#ifndef MUSB_NO_MULTIPOINT
868
869 writeb(devnum, &musbr->tar[MUSB_CONTROL_EP].txfuncaddr);
870 writeb(devnum, &musbr->tar[MUSB_CONTROL_EP].rxfuncaddr);
871#endif
872
873
874 devspeed = get_dev_speed(dev);
875 if ((musb_ishighspeed()) && (dev->parent != NULL) &&
876 (devspeed != MUSB_TYPE_SPEED_HIGH)) {
877 config_hub_port(dev, MUSB_CONTROL_EP);
878 writeb(devspeed << 6, &musbr->txtype);
879 } else {
880 writeb(musb_cfg.musb_speed << 6, &musbr->txtype);
881#ifndef MUSB_NO_MULTIPOINT
882 writeb(0, &musbr->tar[MUSB_CONTROL_EP].txhubaddr);
883 writeb(0, &musbr->tar[MUSB_CONTROL_EP].txhubport);
884 writeb(0, &musbr->tar[MUSB_CONTROL_EP].rxhubaddr);
885 writeb(0, &musbr->tar[MUSB_CONTROL_EP].rxhubport);
886#endif
887 }
888
889
890 if (ctrlreq_setup_phase(dev, setup) < 0)
891 return 0;
892
893 switch (setup->request) {
894 case USB_REQ_GET_DESCRIPTOR:
895 case USB_REQ_GET_CONFIGURATION:
896 case USB_REQ_GET_INTERFACE:
897 case USB_REQ_GET_STATUS:
898 case USB_MSC_BBB_GET_MAX_LUN:
899
900 if (ctrlreq_in_data_phase(dev, len, buffer) < 0)
901 return 0;
902
903 if (ctrlreq_out_status_phase(dev) < 0)
904 return 0;
905 break;
906
907 case USB_REQ_SET_ADDRESS:
908 case USB_REQ_SET_CONFIGURATION:
909 case USB_REQ_SET_FEATURE:
910 case USB_REQ_SET_INTERFACE:
911 case USB_REQ_CLEAR_FEATURE:
912 case USB_MSC_BBB_RESET:
913
914 if (ctrlreq_in_status_phase(dev) < 0)
915 return 0;
916 break;
917
918 case USB_REQ_SET_DESCRIPTOR:
919
920 if (ctrlreq_out_data_phase(dev, len, buffer) < 0)
921 return 0;
922
923 if (ctrlreq_in_status_phase(dev) < 0)
924 return 0;
925 break;
926
927 default:
928
929 return -1;
930 }
931
932 dev->status = 0;
933 dev->act_len = len;
934
935#ifdef MUSB_NO_MULTIPOINT
936
937 if (setup->request == USB_REQ_SET_ADDRESS)
938 writeb(dev->devnum, &musbr->faddr);
939#endif
940
941 return len;
942}
943
944
945
946
947int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
948 void *buffer, int len)
949{
950 int dir_out = usb_pipeout(pipe);
951 int ep = usb_pipeendpoint(pipe);
952#ifndef MUSB_NO_MULTIPOINT
953 int devnum = usb_pipedevice(pipe);
954#endif
955 u8 type;
956 u16 csr;
957 u32 txlen = 0;
958 u32 nextlen = 0;
959 u8 devspeed;
960
961
962 writeb(MUSB_BULK_EP, &musbr->index);
963
964#ifndef MUSB_NO_MULTIPOINT
965
966 if (dir_out)
967 writeb(devnum, &musbr->tar[MUSB_BULK_EP].txfuncaddr);
968 else
969 writeb(devnum, &musbr->tar[MUSB_BULK_EP].rxfuncaddr);
970#endif
971
972
973 devspeed = get_dev_speed(dev);
974 if ((musb_ishighspeed()) && (dev->parent != NULL) &&
975 (devspeed != MUSB_TYPE_SPEED_HIGH)) {
976
977
978
979
980
981 config_hub_port(dev, MUSB_BULK_EP);
982 } else {
983#ifndef MUSB_NO_MULTIPOINT
984 if (dir_out) {
985 writeb(0, &musbr->tar[MUSB_BULK_EP].txhubaddr);
986 writeb(0, &musbr->tar[MUSB_BULK_EP].txhubport);
987 } else {
988 writeb(0, &musbr->tar[MUSB_BULK_EP].rxhubaddr);
989 writeb(0, &musbr->tar[MUSB_BULK_EP].rxhubport);
990 }
991#endif
992 devspeed = musb_cfg.musb_speed;
993 }
994
995
996 write_toggle(dev, ep, dir_out);
997
998 if (dir_out) {
999
1000 type = (devspeed << MUSB_TYPE_SPEED_SHIFT) |
1001 (MUSB_TYPE_PROTO_BULK << MUSB_TYPE_PROTO_SHIFT) |
1002 (ep & MUSB_TYPE_REMOTE_END);
1003 writeb(type, &musbr->txtype);
1004
1005
1006 writew(dev->epmaxpacketout[ep], &musbr->txmaxp);
1007 while (txlen < len) {
1008 nextlen = ((len-txlen) < dev->epmaxpacketout[ep]) ?
1009 (len-txlen) : dev->epmaxpacketout[ep];
1010
1011#ifdef CONFIG_USB_BLACKFIN
1012
1013 writew(nextlen, &musbr->txcount);
1014#endif
1015
1016
1017 write_fifo(MUSB_BULK_EP, nextlen,
1018 (void *)(((u8 *)buffer) + txlen));
1019
1020
1021 csr = readw(&musbr->txcsr);
1022 writew(csr | MUSB_TXCSR_TXPKTRDY, &musbr->txcsr);
1023
1024
1025 if (!wait_until_txep_ready(dev, MUSB_BULK_EP)) {
1026 readw(&musbr->txcsr);
1027 usb_settoggle(dev, ep, dir_out,
1028 (csr >> MUSB_TXCSR_H_DATATOGGLE_SHIFT) & 1);
1029 dev->act_len = txlen;
1030 return 0;
1031 }
1032 txlen += nextlen;
1033 }
1034
1035
1036 csr = readw(&musbr->txcsr);
1037 usb_settoggle(dev, ep, dir_out,
1038 (csr >> MUSB_TXCSR_H_DATATOGGLE_SHIFT) & 1);
1039 } else {
1040
1041 write_toggle(dev, ep, dir_out);
1042
1043
1044 type = (devspeed << MUSB_TYPE_SPEED_SHIFT) |
1045 (MUSB_TYPE_PROTO_BULK << MUSB_TYPE_PROTO_SHIFT) |
1046 (ep & MUSB_TYPE_REMOTE_END);
1047 writeb(type, &musbr->rxtype);
1048
1049
1050 writew(dev->epmaxpacketin[ep], &musbr->rxmaxp);
1051 while (txlen < len) {
1052 nextlen = ((len-txlen) < dev->epmaxpacketin[ep]) ?
1053 (len-txlen) : dev->epmaxpacketin[ep];
1054
1055
1056 csr = readw(&musbr->rxcsr);
1057 writew(csr | MUSB_RXCSR_H_REQPKT, &musbr->rxcsr);
1058
1059
1060 if (!wait_until_rxep_ready(dev, MUSB_BULK_EP)) {
1061 csr = readw(&musbr->rxcsr);
1062 usb_settoggle(dev, ep, dir_out,
1063 (csr >> MUSB_S_RXCSR_H_DATATOGGLE) & 1);
1064 csr &= ~MUSB_RXCSR_RXPKTRDY;
1065 writew(csr, &musbr->rxcsr);
1066 dev->act_len = txlen;
1067 return 0;
1068 }
1069
1070
1071 read_fifo(MUSB_BULK_EP, nextlen,
1072 (void *)(((u8 *)buffer) + txlen));
1073
1074
1075 csr = readw(&musbr->rxcsr);
1076 csr &= ~MUSB_RXCSR_RXPKTRDY;
1077 writew(csr, &musbr->rxcsr);
1078 txlen += nextlen;
1079 }
1080
1081
1082 csr = readw(&musbr->rxcsr);
1083 usb_settoggle(dev, ep, dir_out,
1084 (csr >> MUSB_S_RXCSR_H_DATATOGGLE) & 1);
1085 }
1086
1087
1088 dev->status = 0;
1089 dev->act_len = len;
1090 return 0;
1091}
1092
1093
1094
1095
1096int usb_lowlevel_init(void)
1097{
1098 u8 power;
1099 u32 timeout;
1100
1101 musb_rh_init();
1102
1103 if (musb_platform_init() == -1)
1104 return -1;
1105
1106
1107 musbr = musb_cfg.regs;
1108 musb_configure_ep(&epinfo[0],
1109 sizeof(epinfo) / sizeof(struct musb_epinfo));
1110 musb_start();
1111
1112
1113
1114
1115
1116 timeout = musb_cfg.timeout;
1117 while (timeout--)
1118 if (readb(&musbr->devctl) & MUSB_DEVCTL_HM)
1119 break;
1120
1121
1122 if (!timeout)
1123 return -1;
1124
1125
1126 power = readb(&musbr->power);
1127 writeb(power | MUSB_POWER_RESET, &musbr->power);
1128
1129
1130 udelay(30000);
1131
1132
1133 power = readb(&musbr->power);
1134 power &= ~MUSB_POWER_RESET;
1135 writeb(power, &musbr->power);
1136
1137
1138 musb_cfg.musb_speed = (readb(&musbr->power) & MUSB_POWER_HSMODE) ?
1139 MUSB_TYPE_SPEED_HIGH :
1140 ((readb(&musbr->devctl) & MUSB_DEVCTL_FSDEV) ?
1141 MUSB_TYPE_SPEED_FULL : MUSB_TYPE_SPEED_LOW);
1142 return 0;
1143}
1144
1145
1146
1147
1148int usb_lowlevel_stop(void)
1149{
1150
1151 musb_platform_deinit();
1152 writeb(0, &musbr->devctl);
1153 return 0;
1154}
1155
1156
1157
1158
1159
1160int submit_int_msg(struct usb_device *dev, unsigned long pipe,
1161 void *buffer, int len, int interval)
1162{
1163 int dir_out = usb_pipeout(pipe);
1164 int ep = usb_pipeendpoint(pipe);
1165#ifndef MUSB_NO_MULTIPOINT
1166 int devnum = usb_pipedevice(pipe);
1167#endif
1168 u8 type;
1169 u16 csr;
1170 u32 txlen = 0;
1171 u32 nextlen = 0;
1172 u8 devspeed;
1173
1174
1175 writeb(MUSB_INTR_EP, &musbr->index);
1176
1177#ifndef MUSB_NO_MULTIPOINT
1178
1179 if (dir_out)
1180 writeb(devnum, &musbr->tar[MUSB_INTR_EP].txfuncaddr);
1181 else
1182 writeb(devnum, &musbr->tar[MUSB_INTR_EP].rxfuncaddr);
1183#endif
1184
1185
1186 devspeed = get_dev_speed(dev);
1187 if ((musb_ishighspeed()) && (dev->parent != NULL) &&
1188 (devspeed != MUSB_TYPE_SPEED_HIGH)) {
1189
1190
1191
1192
1193
1194 config_hub_port(dev, MUSB_INTR_EP);
1195 } else {
1196#ifndef MUSB_NO_MULTIPOINT
1197 if (dir_out) {
1198 writeb(0, &musbr->tar[MUSB_INTR_EP].txhubaddr);
1199 writeb(0, &musbr->tar[MUSB_INTR_EP].txhubport);
1200 } else {
1201 writeb(0, &musbr->tar[MUSB_INTR_EP].rxhubaddr);
1202 writeb(0, &musbr->tar[MUSB_INTR_EP].rxhubport);
1203 }
1204#endif
1205 devspeed = musb_cfg.musb_speed;
1206 }
1207
1208
1209 write_toggle(dev, ep, dir_out);
1210
1211 if (!dir_out) {
1212
1213 write_toggle(dev, ep, dir_out);
1214 writeb(interval, &musbr->rxinterval);
1215
1216
1217 type = (devspeed << MUSB_TYPE_SPEED_SHIFT) |
1218 (MUSB_TYPE_PROTO_INTR << MUSB_TYPE_PROTO_SHIFT) |
1219 (ep & MUSB_TYPE_REMOTE_END);
1220 writeb(type, &musbr->rxtype);
1221
1222
1223 writew(dev->epmaxpacketin[ep], &musbr->rxmaxp);
1224
1225 while (txlen < len) {
1226 nextlen = ((len-txlen) < dev->epmaxpacketin[ep]) ?
1227 (len-txlen) : dev->epmaxpacketin[ep];
1228
1229
1230 csr = readw(&musbr->rxcsr);
1231 writew(csr | MUSB_RXCSR_H_REQPKT, &musbr->rxcsr);
1232
1233
1234 if (!wait_until_rxep_ready(dev, MUSB_INTR_EP)) {
1235 csr = readw(&musbr->rxcsr);
1236 usb_settoggle(dev, ep, dir_out,
1237 (csr >> MUSB_S_RXCSR_H_DATATOGGLE) & 1);
1238 csr &= ~MUSB_RXCSR_RXPKTRDY;
1239 writew(csr, &musbr->rxcsr);
1240 dev->act_len = txlen;
1241 return 0;
1242 }
1243
1244
1245 read_fifo(MUSB_INTR_EP, nextlen,
1246 (void *)(((u8 *)buffer) + txlen));
1247
1248
1249 csr = readw(&musbr->rxcsr);
1250 csr &= ~MUSB_RXCSR_RXPKTRDY;
1251 writew(csr, &musbr->rxcsr);
1252 txlen += nextlen;
1253 }
1254
1255
1256 csr = readw(&musbr->rxcsr);
1257 usb_settoggle(dev, ep, dir_out,
1258 (csr >> MUSB_S_RXCSR_H_DATATOGGLE) & 1);
1259 }
1260
1261
1262 dev->irq_status = 0;
1263 dev->irq_act_len = len;
1264 dev->irq_handle(dev);
1265 dev->status = 0;
1266 dev->act_len = len;
1267 return 0;
1268}
1269
1270
1271#ifdef CONFIG_SYS_USB_EVENT_POLL
1272
1273
1274
1275void usb_event_poll()
1276{
1277 struct stdio_dev *dev;
1278 struct usb_device *usb_kbd_dev;
1279 struct usb_interface *iface;
1280 struct usb_endpoint_descriptor *ep;
1281 int pipe;
1282 int maxp;
1283
1284
1285 dev = stdio_get_by_name("usbkbd");
1286 usb_kbd_dev = (struct usb_device *)dev->priv;
1287 iface = &usb_kbd_dev->config.if_desc[0];
1288 ep = &iface->ep_desc[0];
1289 pipe = usb_rcvintpipe(usb_kbd_dev, ep->bEndpointAddress);
1290
1291
1292 maxp = usb_maxpacket(usb_kbd_dev, pipe);
1293 usb_submit_int_msg(usb_kbd_dev, pipe, &new[0],
1294 maxp > 8 ? 8 : maxp, ep->bInterval);
1295}
1296#endif
1297