uboot/include/configs/METROBOX.h
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   1/*
   2 * (C) Copyright 2004 Sandburst Corporation
   3 *
   4 * See file CREDITS for list of people who contributed to this
   5 * project.
   6 *
   7 * This program is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU General Public License as
   9 * published by the Free Software Foundation; either version 2 of
  10 * the License, or (at your option) any later version.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License
  18 * along with this program; if not, write to the Free Software
  19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20 * MA 02111-1307 USA
  21 */
  22
  23/************************************************************************
  24 * METROBOX.h - configuration Sandburst MetroBox
  25 ***********************************************************************/
  26
  27/*
  28 * $Id: METROBOX.h,v 1.21 2005/06/03 15:05:25 tsawyer Exp $
  29 *
  30 *
  31 * $Log: METROBOX.h,v $
  32 * Revision 1.21  2005/06/03 15:05:25  tsawyer
  33 * MB rev 2.0.3 KA rev 0.0.7.  Add CONFIG_VERSION_VARIABLE, Add fakeled to MB
  34 *
  35 * Revision 1.20  2005/04/11 20:51:11  tsawyer
  36 * fix ethernet
  37 *
  38 * Revision 1.19  2005/04/06 15:13:36  tsawyer
  39 * Update appropriate files to coincide with u-boot 1.1.3
  40 *
  41 * Revision 1.18  2005/03/10 14:16:02  tsawyer
  42 * add def'n for cis8201 short etch option.
  43 *
  44 * Revision 1.17  2005/03/09 19:49:51  tsawyer
  45 * Remove KGDB to allow use of 2nd serial port
  46 *
  47 * Revision 1.16  2004/12/02 19:00:23  tsawyer
  48 * Add misc_init_f to turn on i2c-1 and all four fans before sdram init
  49 *
  50 * Revision 1.15  2004/09/15 18:04:12  tsawyer
  51 * add multiple serial port support
  52 *
  53 * Revision 1.14  2004/09/03 15:27:51  tsawyer
  54 * All metrobox boards are at 66.66 sys clock
  55 *
  56 * Revision 1.13  2004/08/05 20:27:46  tsawyer
  57 * Remove system ace definitions, add net console support
  58 *
  59 * Revision 1.12  2004/07/29 20:00:13  tsawyer
  60 * Add i2c bus 1
  61 *
  62 * Revision 1.11  2004/07/21 13:44:18  tsawyer
  63 * SystemACE is out, CF direct to local bus is in
  64 *
  65 * Revision 1.10  2004/06/29 19:08:55  tsawyer
  66 * Add CONFIG_MISC_INIT_R
  67 *
  68 * Revision 1.9  2004/06/28 21:30:53  tsawyer
  69 * Fix default BOOTARGS
  70 *
  71 * Revision 1.8  2004/06/17 15:51:08  tsawyer
  72 * auto complete
  73 *
  74 * Revision 1.7  2004/06/17 15:08:49  tsawyer
  75 * Add autocomplete
  76 *
  77 * Revision 1.6  2004/06/15 12:33:57  tsawyer
  78 * debugging checkpoint
  79 *
  80 * Revision 1.5  2004/06/12 19:48:28  tsawyer
  81 * Debugging checkpoint
  82 *
  83 * Revision 1.4  2004/06/02 13:03:06  tsawyer
  84 * Fix eth addrs
  85 *
  86 * Revision 1.3  2004/05/18 19:56:10  tsawyer
  87 * Change default bootcommand to pImage.metrobox
  88 *
  89 * Revision 1.2  2004/05/18 14:13:44  tsawyer
  90 * Add bringup values for bootargs and bootcommand.
  91 * Remove definition of ipaddress and serverip addresses.
  92 *
  93 * Revision 1.1  2004/04/16 15:08:54  tsawyer
  94 * Initial Revision
  95 *
  96 *
  97 */
  98
  99#ifndef __CONFIG_H
 100#define __CONFIG_H
 101
 102/*-----------------------------------------------------------------------
 103 * High Level Configuration Options
 104 *----------------------------------------------------------------------*/
 105#define CONFIG_METROBOX           1          /* Board is Metrobox       */
 106#define CONFIG_440GX              1          /* Specifc GX support      */
 107#define CONFIG_440                1          /* ... PPC440 family       */
 108#define CONFIG_4xx                1          /* ... PPC4xx family       */
 109#define CONFIG_BOARD_EARLY_INIT_F 1          /* Call board_pre_init     */
 110#define CONFIG_MISC_INIT_F        1          /* Call board misc_init_f  */
 111#define CONFIG_MISC_INIT_R        1          /* Call board misc_init_r  */
 112
 113#define CONFIG_SYS_TEXT_BASE    0xFFF80000
 114
 115#undef  CONFIG_SYS_DRAM_TEST                         /* Disable-takes long time!*/
 116#define CONFIG_SYS_CLK_FREQ       66666666   /* external freq to pll    */
 117
 118#define CONFIG_VERY_BIG_RAM 1
 119#define CONFIG_VERSION_VARIABLE
 120
 121#define CONFIG_IDENT_STRING " Sandburst Metrobox"
 122
 123/*-----------------------------------------------------------------------
 124 * Base addresses -- Note these are effective addresses where the
 125 * actual resources get mapped (not physical addresses)
 126 *----------------------------------------------------------------------*/
 127#define CONFIG_SYS_SDRAM_BASE          0x00000000    /* _must_ be 0             */
 128#define CONFIG_SYS_FLASH_BASE          0xfff80000    /* start of FLASH          */
 129#define CONFIG_SYS_MONITOR_BASE       0xfff80000    /* start of monitor */
 130#define CONFIG_SYS_PCI_MEMBASE         0x80000000    /* mapped pci memory       */
 131#define CONFIG_SYS_ISRAM_BASE          0xc0000000    /* internal SRAM           */
 132#define CONFIG_SYS_PCI_BASE            0xd0000000    /* internal PCI regs       */
 133
 134#define CONFIG_SYS_NVRAM_BASE_ADDR   (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
 135#define CONFIG_SYS_FPGA_BASE          (CONFIG_SYS_PERIPHERAL_BASE + 0x08200000)
 136#define CONFIG_SYS_BME32_BASE         (CONFIG_SYS_PERIPHERAL_BASE + 0x08500000)
 137#define CONFIG_SYS_GPIO_BASE          (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
 138
 139/*-----------------------------------------------------------------------
 140 * Initial RAM & stack pointer (placed in internal SRAM)
 141 *----------------------------------------------------------------------*/
 142#define CONFIG_SYS_TEMP_STACK_OCM    1
 143#define CONFIG_SYS_OCM_DATA_ADDR     CONFIG_SYS_ISRAM_BASE
 144#define CONFIG_SYS_INIT_RAM_ADDR     CONFIG_SYS_ISRAM_BASE /* Initial RAM address       */
 145#define CONFIG_SYS_INIT_RAM_SIZE      0x2000         /* Size of used area in RAM */
 146
 147#define CONFIG_SYS_GBL_DATA_OFFSET   (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 148#define CONFIG_SYS_INIT_SP_OFFSET    (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
 149
 150#define CONFIG_SYS_MONITOR_LEN        (256 * 1024)   /* Rsrv 256kB for Mon      */
 151#define CONFIG_SYS_MALLOC_LEN         (128 * 1024)   /* Rsrv 128kB for malloc   */
 152
 153/*-----------------------------------------------------------------------
 154 * Serial Port
 155 *----------------------------------------------------------------------*/
 156#define CONFIG_CONS_INDEX       1       /* Use UART0                    */
 157#define CONFIG_SYS_NS16550
 158#define CONFIG_SYS_NS16550_SERIAL
 159#define CONFIG_SYS_NS16550_REG_SIZE     1
 160#define CONFIG_SYS_NS16550_CLK          get_serial_clock()
 161#define CONFIG_SERIAL_MULTI   1
 162#define CONFIG_BAUDRATE       9600
 163
 164#define CONFIG_SYS_BAUDRATE_TABLE  \
 165    {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
 166
 167/*-----------------------------------------------------------------------
 168 * NVRAM/RTC
 169 *
 170 * NOTE: Upper 8 bytes of NVRAM is where the RTC registers are located.
 171 * The DS1743 code assumes this condition (i.e. -- it assumes the base
 172 * address for the RTC registers is:
 173 *
 174 *      CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE
 175 *
 176 *----------------------------------------------------------------------*/
 177#define CONFIG_SYS_NVRAM_SIZE         (0x2000 - 8)   /* NVRAM size(8k)- RTC regs*/
 178#define CONFIG_RTC_DS174x     1              /* DS1743 RTC              */
 179
 180/*-----------------------------------------------------------------------
 181 * FLASH related
 182 *----------------------------------------------------------------------*/
 183#define CONFIG_SYS_MAX_FLASH_BANKS   1               /* number of banks         */
 184#define CONFIG_SYS_MAX_FLASH_SECT    8               /* sectors per device      */
 185
 186#undef  CONFIG_SYS_FLASH_CHECKSUM
 187#define CONFIG_SYS_FLASH_ERASE_TOUT  120000          /* Flash Erase TO (in ms)   */
 188#define CONFIG_SYS_FLASH_WRITE_TOUT  500             /* Flash Write TO(in ms)    */
 189
 190/*-----------------------------------------------------------------------
 191 * DDR SDRAM
 192 *----------------------------------------------------------------------*/
 193#define CONFIG_SPD_EEPROM     1              /* Use SPD EEPROM for setup*/
 194#define SPD_EEPROM_ADDRESS    {0x53}         /* SPD i2c spd addresses   */
 195
 196/*-----------------------------------------------------------------------
 197 * I2C
 198 *----------------------------------------------------------------------*/
 199#define CONFIG_HARD_I2C       1              /* I2C hardware support    */
 200#undef  CONFIG_SOFT_I2C                      /* I2C !bit-banged         */
 201#define CONFIG_PPC4XX_I2C               /* use PPC4xx driver            */
 202#define CONFIG_SYS_I2C_SPEED          400000         /* I2C speed 400kHz        */
 203#define CONFIG_SYS_I2C_SLAVE          0x7F           /* I2C slave address       */
 204#define CONFIG_SYS_I2C_NOPROBES      {0x69}          /* Don't probe these addrs */
 205#define CONFIG_I2C_BUS1       1              /* Include i2c bus 1 supp  */
 206
 207
 208/*-----------------------------------------------------------------------
 209 * Environment
 210 *----------------------------------------------------------------------*/
 211#define CONFIG_ENV_IS_IN_NVRAM   1                   /* Environment uses NVRAM  */
 212#undef  CONFIG_ENV_IS_IN_FLASH               /* ... not in flash        */
 213#undef  CONFIG_ENV_IS_IN_EEPROM              /* ... not in EEPROM       */
 214#define CONFIG_ENV_OVERWRITE  1              /* allow env overwrite     */
 215
 216#define CONFIG_ENV_SIZE       0x1000         /* Size of Env vars        */
 217#define CONFIG_ENV_ADDR       (CONFIG_SYS_NVRAM_BASE_ADDR)
 218
 219#define CONFIG_BOOTARGS       "console=ttyS0,9600 root=/dev/nfs rw nfsroot=$serverip:/home/metrobox0 nfsaddrs=$ipaddr:::::eth0:none "
 220#define CONFIG_BOOTCOMMAND    "tftp 8000000 pImage.metrobox;bootm 8000000"
 221#define CONFIG_BOOTDELAY      5             /* disable autoboot */
 222
 223#define CONFIG_LOADS_ECHO     1              /* echo on for serial dnld */
 224#define CONFIG_SYS_LOADS_BAUD_CHANGE 1               /* allow baudrate change   */
 225
 226/*-----------------------------------------------------------------------
 227 * Networking
 228 *----------------------------------------------------------------------*/
 229#define CONFIG_PPC4xx_EMAC
 230#define CONFIG_MII            1              /* MII PHY management      */
 231#define CONFIG_NET_MULTI      1
 232#define CONFIG_PHY_ADDR       0xff           /* no phy on EMAC0         */
 233#define CONFIG_PHY1_ADDR      0xff           /* no phy on EMAC1         */
 234#define CONFIG_PHY2_ADDR      0x08           /* PHY addr, MGMT, EMAC2   */
 235#define CONFIG_PHY3_ADDR      0x18           /* PHY addr, LCL, EMAC3    */
 236#define CONFIG_HAS_ETH0
 237#define CONFIG_HAS_ETH1
 238#define CONFIG_HAS_ETH2
 239#define CONFIG_HAS_ETH3
 240#define CONFIG_PHY_RESET      1              /* reset phy upon startup  */
 241#define CONFIG_CIS8201_PHY    1              /* RGMII mode for Cicada   */
 242#define CONFIG_CIS8201_SHORT_ETCH 1          /* Use short etch mode     */
 243#define CONFIG_PHY_GIGE       1              /* GbE speed/duplex detect */
 244#define CONFIG_PHY_RESET_DELAY 1000
 245#define CONFIG_NETMASK        255.255.0.0
 246#define CONFIG_ETHADDR        00:00:00:00:00:00 /* No EMAC 0 support    */
 247#define CONFIG_ETH1ADDR       00:00:00:00:00:00 /* No EMAC 1 support    */
 248#define CONFIG_SYS_RX_ETH_BUFFER     32      /* #eth rx buff & descrs   */
 249
 250
 251/*
 252 * BOOTP options
 253 */
 254#define CONFIG_BOOTP_BOOTFILESIZE
 255#define CONFIG_BOOTP_BOOTPATH
 256#define CONFIG_BOOTP_GATEWAY
 257#define CONFIG_BOOTP_HOSTNAME
 258
 259
 260/*
 261 * Command line configuration.
 262 */
 263#include <config_cmd_default.h>
 264
 265#define CONFIG_CMD_PCI
 266#define CONFIG_CMD_IRQ
 267#define CONFIG_CMD_I2C
 268#define CONFIG_CMD_DHCP
 269#define CONFIG_CMD_DATE
 270#define CONFIG_CMD_BEDBUG
 271#define CONFIG_CMD_PING
 272#define CONFIG_CMD_DIAG
 273#define CONFIG_CMD_MII
 274#define CONFIG_CMD_NET
 275#define CONFIG_CMD_ELF
 276#define CONFIG_CMD_IDE
 277#define CONFIG_CMD_FAT
 278
 279
 280/* Include NetConsole support */
 281#define CONFIG_NETCONSOLE
 282
 283/* Include auto complete with tabs */
 284#define CONFIG_AUTO_COMPLETE 1
 285#define CONFIG_AUTO_COMPLETE 1
 286#define CONFIG_SYS_ALT_MEMTEST       1       /* use real memory test     */
 287
 288#define CONFIG_SYS_LONGHELP                          /* undef to save memory    */
 289#define CONFIG_SYS_PROMPT             "MetroBox=> "  /* Monitor Command Prompt  */
 290
 291#define CONFIG_SYS_HUSH_PARSER         1             /* HUSH for ext'd cli      */
 292#define CONFIG_SYS_PROMPT_HUSH_PS2    "> "
 293
 294
 295/*-----------------------------------------------------------------------
 296 * Console Buffer
 297 *----------------------------------------------------------------------*/
 298#if defined(CONFIG_CMD_KGDB)
 299#define CONFIG_SYS_CBSIZE             1024           /* Console I/O Buffer Size */
 300#else
 301#define CONFIG_SYS_CBSIZE             256            /* Console I/O Buffer Size */
 302#endif
 303#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 304                                             /* Print Buffer Size       */
 305#define CONFIG_SYS_MAXARGS            16             /* max number of cmd args  */
 306#define CONFIG_SYS_BARGSIZE           CONFIG_SYS_CBSIZE     /* Boot Arg Buffer Size     */
 307
 308/*-----------------------------------------------------------------------
 309 * Memory Test
 310 *----------------------------------------------------------------------*/
 311#define CONFIG_SYS_MEMTEST_START     0x0400000       /* memtest works on        */
 312#define CONFIG_SYS_MEMTEST_END        0x0C00000      /* 4 ... 12 MB in DRAM     */
 313
 314/*-----------------------------------------------------------------------
 315 * Compact Flash (in true IDE mode)
 316 *----------------------------------------------------------------------*/
 317#undef  CONFIG_IDE_8xx_DIRECT           /* no pcmcia interface required */
 318#undef  CONFIG_IDE_LED                  /* no led for ide supported     */
 319
 320#define CONFIG_IDE_RESET                /* reset for ide supported      */
 321#define CONFIG_SYS_IDE_MAXBUS           1       /* max. 1 IDE busses    */
 322#define CONFIG_SYS_IDE_MAXDEVICE        (CONFIG_SYS_IDE_MAXBUS*1) /* max. 1 drives per IDE bus */
 323
 324#define CONFIG_SYS_ATA_BASE_ADDR        0xF0000000
 325#define CONFIG_SYS_ATA_IDE0_OFFSET      0x0000
 326#define CONFIG_SYS_ATA_DATA_OFFSET      0x0000   /* Offset for data I/O */
 327#define CONFIG_SYS_ATA_REG_OFFSET       0x0000   /* Offset for normal register accesses*/
 328#define CONFIG_SYS_ATA_ALT_OFFSET       0x100000 /* Offset for alternate registers */
 329
 330#define CONFIG_SYS_ATA_STRIDE           2        /* Directly connected CF, needs a stride
 331                                            to get to the correct offset */
 332#define CONFIG_DOS_PARTITION  1              /* Include dos partition   */
 333
 334/*-----------------------------------------------------------------------
 335 * PCI
 336 *----------------------------------------------------------------------*/
 337/* General PCI */
 338#define CONFIG_PCI                           /* include pci support     */
 339#define CONFIG_PCI_PNP                       /* do pci plug-and-play    */
 340#define CONFIG_PCI_SCAN_SHOW                 /* show pci devices        */
 341#define CONFIG_SYS_PCI_TARGBASE      (CONFIG_SYS_PCI_MEMBASE)
 342
 343/* Board-specific PCI */
 344#define CONFIG_SYS_PCI_TARGET_INIT                   /* let board init pci target*/
 345
 346#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x17BA        /* Sandburst */
 347#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe        /* Whatever */
 348
 349/*
 350 * For booting Linux, the board info and command line data
 351 * have to be in the first 8 MB of memory, since this is
 352 * the maximum mapped by the Linux kernel during initialization.
 353 */
 354#define CONFIG_SYS_BOOTMAPSZ            (8 << 20) /* Initial Memory map for Linux */
 355
 356#if defined(CONFIG_CMD_KGDB)
 357#define CONFIG_KGDB_BAUDRATE  230400         /* kgdb serial port baud   */
 358#define CONFIG_KGDB_SER_INDEX 2              /* kgdb serial port        */
 359#endif
 360
 361/*-----------------------------------------------------------------------
 362 * Miscellaneous configurable options
 363 *----------------------------------------------------------------------*/
 364#undef CONFIG_WATCHDOG                       /* watchdog disabled       */
 365#define CONFIG_SYS_LOAD_ADDR          0x8000000      /* default load address    */
 366#define CONFIG_SYS_EXTBDINFO          1              /* use extended board_info */
 367
 368#define CONFIG_SYS_HZ                 100            /* decr freq: 1 ms ticks   */
 369
 370
 371#endif  /* __CONFIG_H */
 372