1/* 2 * (C) Copyright 2002 3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 4 * Marius Groeger <mgroeger@sysgo.de> 5 * 6 * 2004 (c) MontaVista Software, Inc. 7 * 8 * Configuation settings for the Intel Assabet board. 9 * 10 * See file CREDITS for list of people who contributed to this 11 * project. 12 * 13 * This program is free software; you can redistribute it and/or 14 * modify it under the terms of the GNU General Public License as 15 * published by the Free Software Foundation; either version 2 of 16 * the License, or (at your option) any later version. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 * 23 * You should have received a copy of the GNU General Public License 24 * along with this program; if not, write to the Free Software 25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 26 * MA 02111-1307 USA 27 */ 28 29#ifndef __CONFIG_H 30#define __CONFIG_H 31 32/* 33 * High Level Configuration Options 34 * (easy to change) 35 */ 36#define CONFIG_SA1110 1 /* This is an SA1100 CPU */ 37#define CONFIG_ASSABET 1 /* on an Intel Assabet Board */ 38 39#undef CONFIG_USE_IRQ 40/* we will never enable dcache, because we have to setup MMU first */ 41#define CONFIG_SYS_NO_DCACHE 42 43#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 44#define CONFIG_SETUP_MEMORY_TAGS 1 45#define CONFIG_INITRD_TAG 1 46 47/* 48 * Size of malloc() pool 49 */ 50#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) 51 52/* 53 * Hardware drivers 54 */ 55#define CONFIG_NET_MULTI 56#define CONFIG_LAN91C96 /* we have an SMC9194 on-board */ 57#define CONFIG_LAN91C96_BASE 0x18000000 58 59/* 60 * select serial console configuration 61 */ 62#define CONFIG_SA1100_SERIAL 63#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on Intel Assabet */ 64 65/* allow to overwrite serial and ethaddr */ 66#define CONFIG_ENV_OVERWRITE 67 68#define CONFIG_BAUDRATE 115200 69 70 71/* 72 * Command line configuration. 73 */ 74#include <config_cmd_default.h> 75 76#define CONFIG_CMD_DHCP 77 78 79/* 80 * BOOTP options 81 */ 82#define CONFIG_BOOTP_SUBNETMASK 83#define CONFIG_BOOTP_GATEWAY 84#define CONFIG_BOOTP_HOSTNAME 85#define CONFIG_BOOTP_BOOTPATH 86 87 88#define CONFIG_BOOTDELAY 3 89#define CONFIG_BOOTARGS "console=ttySA0,115200n8 root=/dev/nfs ip=bootp" 90#define CONFIG_BOOTCOMMAND "bootp;tftp;bootm" 91#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */ 92 93#if defined(CONFIG_CMD_KGDB) 94#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ 95#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ 96#endif 97 98/* 99 * Miscellaneous configurable options 100 */ 101#define CONFIG_SYS_LONGHELP /* undef to save memory */ 102#define CONFIG_SYS_PROMPT "Intel Assabet # " /* Monitor Command Prompt */ 103#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 104#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 105#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 106#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 107 108#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ 109#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ 110 111#define CONFIG_SYS_LOAD_ADDR 0xc0000000 /* default load address */ 112 113#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ 114#define CONFIG_SYS_CPUSPEED 0x0a /* set core clock to 206MHz */ 115 116 /* valid baudrates */ 117#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 118 119/*----------------------------------------------------------------------- 120 * Stack sizes 121 * 122 * The stack sizes are set up in start.S using the settings below 123 */ 124#define CONFIG_STACKSIZE (128*1024) /* regular stack */ 125#ifdef CONFIG_USE_IRQ 126#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ 127#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ 128#endif 129 130/*----------------------------------------------------------------------- 131 * Physical Memory Map 132 */ 133#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of SDRAM */ 134#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */ 135#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ 136 137#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ 138#define PHYS_FLASH_SIZE 0x02000000 /* 32 MB */ 139#define PHYS_FLASH_BANK_SIZE 0x01000000 /* 16 MB Banks */ 140#define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */ 141 142#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 143#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 KB for Monitor */ 144 145#if CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE 146#define CONFIG_SYS_RAMSTART 147#endif 148 149/*----------------------------------------------------------------------- 150 * FLASH and environment organization 151 */ 152 153#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 154#define CONFIG_SYS_FLASH_SIZE PHYS_FLASH_SIZE 155#define CONFIG_SYS_FLASH_CFI 1 /* flash is CFI conformant */ 156#define CONFIG_FLASH_CFI_DRIVER 1 /* use common cfi driver */ 157#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ 158#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */ 159#define CONFIG_SYS_FLASH_INCREMENT 0 /* there is only one bank */ 160#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max # of sectors on one chip */ 161#undef CONFIG_SYS_FLASH_PROTECTION 162#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 163 164#define CONFIG_ENV_IS_IN_FLASH 1 165 166#if defined(CONFIG_ENV_IS_IN_FLASH) 167#define CONFIG_ENV_IN_OWN_SECTOR 1 168#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + PHYS_FLASH_SECT_SIZE) 169#define CONFIG_ENV_SIZE PHYS_FLASH_SECT_SIZE 170#define CONFIG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE 171#endif 172 173#endif /* __CONFIG_H */ 174