1/* 2 * U-boot - Configuration file for CM-BF561 board 3 */ 4 5#ifndef __CONFIG_CM_BF561_H__ 6#define __CONFIG_CM_BF561_H__ 7 8#include <asm/config-pre.h> 9 10 11/* 12 * Processor Settings 13 */ 14#define CONFIG_BFIN_CPU bf561-0.3 15#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA 16 17 18/* 19 * Clock Settings 20 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV 21 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV 22 */ 23/* CONFIG_CLKIN_HZ is any value in Hz */ 24#define CONFIG_CLKIN_HZ 25000000 25/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ 26/* 1 = CLKIN / 2 */ 27#define CONFIG_CLKIN_HALF 0 28/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ 29/* 1 = bypass PLL */ 30#define CONFIG_PLL_BYPASS 0 31/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ 32/* Values can range from 0-63 (where 0 means 64) */ 33#define CONFIG_VCO_MULT 20 34/* CCLK_DIV controls the core clock divider */ 35/* Values can be 1, 2, 4, or 8 ONLY */ 36#define CONFIG_CCLK_DIV 1 37/* SCLK_DIV controls the system clock divider */ 38/* Values can range from 1-15 */ 39#define CONFIG_SCLK_DIV 5 40 41/* Decrease core voltage */ 42#define CONFIG_VR_CTL_VAL (VLEV_110 | GAIN_20 | FREQ_1000) 43 44 45/* 46 * Memory Settings 47 */ 48#define CONFIG_MEM_ADD_WDTH 9 49#define CONFIG_MEM_SIZE 64 50 51#define CONFIG_EBIU_SDRRC_VAL ((((CONFIG_SCLK_HZ / 1000) * 64) / 4096) - (7 + 2)) 52#define CONFIG_EBIU_SDGCTL_VAL (SCTLE | PSS | TWR_2 | TRCD_2 | TRP_2 | TRAS_7 | PASR_ALL | CL_3) 53 54#define CONFIG_EBIU_AMGCTL_VAL (CDPRIO | B3_PEN | B2_PEN | B1_PEN | B0_PEN | AMBEN_ALL | AMCKEN) 55#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) 56#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) 57 58#define CONFIG_SYS_MONITOR_LEN (256 * 1024) 59#define CONFIG_SYS_MALLOC_LEN (128 * 1024) 60 61 62/* 63 * Network Settings 64 */ 65#define ADI_CMDS_NETWORK 1 66#define CONFIG_NET_MULTI 67#define CONFIG_SMC911X 1 68#define CONFIG_SMC911X_BASE 0x24008000 /* AMS1 */ 69#define CONFIG_SMC911X_16_BIT 70#define CONFIG_HOSTNAME cm-bf561 71/* Uncomment next line to use fixed MAC address */ 72/* #define CONFIG_ETHADDR 02:80:ad:20:31:cf */ 73 74 75/* 76 * Flash Settings 77 */ 78#define CONFIG_FLASH_CFI_DRIVER 79#define CONFIG_SYS_FLASH_BASE 0x20000000 80#define CONFIG_SYS_FLASH_CFI 81#define CONFIG_SYS_FLASH_PROTECTION 82#define CONFIG_SYS_MAX_FLASH_BANKS 1 83#define CONFIG_SYS_MAX_FLASH_SECT 67 84 85 86/* 87 * Env Storage Settings 88 */ 89#define CONFIG_ENV_IS_IN_FLASH 1 90#define CONFIG_ENV_OFFSET 0x20000 91#define CONFIG_ENV_SECT_SIZE 0x20000 92#define CONFIG_ENV_SIZE 0x10000 93#define CONFIG_ENV_IS_EMBEDDED_IN_LDR 94 95 96/* 97 * Misc Settings 98 */ 99#define CONFIG_BAUDRATE 115200 100#define CONFIG_UART_CONSOLE 0 101#define CONFIG_BOOTCOMMAND "run flashboot" 102#define FLASHBOOT_ENV_SETTINGS "flashboot=bootm 0x20040000\0" 103 104 105/* 106 * Pull in common ADI header for remaining command/environment setup 107 */ 108#include <configs/bfin_adi_common.h> 109 110#endif 111