LXR uboot/include/configs/omap3

   1/*
   2 * (C) Copyright 2006-2008
   3 * Texas Instruments.
   4 * Richard Woodruff <r-woodruff2@ti.com>
   5 * Syed Mohammed Khasim <x0khasim@ti.com>
   6 *
   7 * Configuration settings for the TI OMAP3530 Beagle board.
   8 *
   9 * See file CREDITS for list of people who contributed to this
  10 * project.
  11 *
  12 * This program is free software; you can redistribute it and/or
  13 * modify it under the terms of the GNU General Public License as
  14 * published by the Free Software Foundation; either version 2 of
  15 * the License, or (at your option) any later version.
  16 *
  17 * This program is distributed in the hope that it will be useful,
  18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20 * GNU General Public License for more details.
  21 *
  22 * You should have received a copy of the GNU General Public License
  23 * along with this program; if not, write to the Free Software
  24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25 * MA 02111-1307 USA
  26 */
  27
  28#ifndef __CONFIG_H
  29#define __CONFIG_H
  30
  31/*
  32 * High Level Configuration Options
  33 */
  34#define CONFIG_ARMV7            1       /* This is an ARM V7 CPU core */
  35#define CONFIG_OMAP             1       /* in a TI OMAP core */
  36#define CONFIG_OMAP34XX         1       /* which is a 34XX */
  37#define CONFIG_OMAP3430         1       /* which is in a 3430 */
  38#define CONFIG_OMAP3_BEAGLE     1       /* working with BEAGLE */
  39
  40#define CONFIG_SDRC     /* The chip has SDRC controller */
  41
  42#include <asm/arch/cpu.h>               /* get chip and board defs */
  43#include <asm/arch/omap3.h>
  44
  45/*
  46 * Display CPU and Board information
  47 */
  48#define CONFIG_DISPLAY_CPUINFO          1
  49#define CONFIG_DISPLAY_BOARDINFO        1
  50
  51/* Clock Defines */
  52#define V_OSCK                  26000000        /* Clock output from T2 */
  53#define V_SCLK                  (V_OSCK >> 1)
  54
  55#undef CONFIG_USE_IRQ                           /* no support for IRQs */
  56#define CONFIG_MISC_INIT_R
  57
  58#define CONFIG_OF_LIBFDT                1
  59
  60#define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  61#define CONFIG_SETUP_MEMORY_TAGS        1
  62#define CONFIG_INITRD_TAG               1
  63#define CONFIG_REVISION_TAG             1
  64
  65/*
  66 * Size of malloc() pool
  67 */
  68#define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB */
  69                                                /* Sector */
  70#define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  71
  72/*
  73 * Hardware drivers
  74 */
  75
  76/*
  77 * NS16550 Configuration
  78 */
  79#define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  80
  81#define CONFIG_SYS_NS16550
  82#define CONFIG_SYS_NS16550_SERIAL
  83#define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  84#define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  85
  86/*
  87 * select serial console configuration
  88 */
  89#define CONFIG_CONS_INDEX               3
  90#define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  91#define CONFIG_SERIAL3                  3       /* UART3 on Beagle Rev 2 */
  92
  93/* allow to overwrite serial and ethaddr */
  94#define CONFIG_ENV_OVERWRITE
  95#define CONFIG_BAUDRATE                 115200
  96#define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  97                                        115200}
  98#define CONFIG_GENERIC_MMC              1
  99#define CONFIG_MMC                      1
 100#define CONFIG_OMAP_HSMMC               1
 101#define CONFIG_DOS_PARTITION            1
 102
 103/* Status LED */
 104#define CONFIG_STATUS_LED               1
 105#define CONFIG_BOARD_SPECIFIC_LED       1
 106#define STATUS_LED_BIT                  0x01
 107#define STATUS_LED_STATE                STATUS_LED_ON
 108#define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 2)
 109#define STATUS_LED_BIT1                 0x02
 110#define STATUS_LED_STATE1               STATUS_LED_ON
 111#define STATUS_LED_PERIOD1              (CONFIG_SYS_HZ / 2)
 112#define STATUS_LED_BOOT                 STATUS_LED_BIT
 113#define STATUS_LED_GREEN                STATUS_LED_BIT1
 114
 115/* DDR - I use Micron DDR */
 116#define CONFIG_OMAP3_MICRON_DDR         1
 117
 118/* USB */
 119#define CONFIG_MUSB_UDC                 1
 120#define CONFIG_USB_OMAP3                1
 121#define CONFIG_TWL4030_USB              1
 122
 123/* USB device configuration */
 124#define CONFIG_USB_DEVICE               1
 125#define CONFIG_USB_TTY                  1
 126#define CONFIG_SYS_CONSOLE_IS_IN_ENV    1
 127
 128/* USB EHCI */
 129#define CONFIG_CMD_USB
 130#define CONFIG_USB_EHCI
 131#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
 132
 133/* commands to include */
 134#include <config_cmd_default.h>
 135
 136#define CONFIG_CMD_CACHE
 137#define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 138#define CONFIG_CMD_FAT          /* FAT support                  */
 139#define CONFIG_CMD_JFFS2        /* JFFS2 Support                */
 140#define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands */
 141#define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
 142#define MTDIDS_DEFAULT                  "nand0=nand"
 143#define MTDPARTS_DEFAULT                "mtdparts=nand:512k(x-loader),"\
 144                                        "1920k(u-boot),128k(u-boot-env),"\
 145                                        "4m(kernel),-(fs)"
 146
 147#define CONFIG_CMD_I2C          /* I2C serial bus support       */
 148#define CONFIG_CMD_MMC          /* MMC support                  */
 149#define CONFIG_USB_STORAGE      /* USB storage support          */
 150#define CONFIG_CMD_NAND         /* NAND support                 */
 151#define CONFIG_CMD_LED          /* LED support                  */
 152
 153#undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
 154#undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
 155#undef CONFIG_CMD_IMI           /* iminfo                       */
 156#undef CONFIG_CMD_IMLS          /* List all found images        */
 157#undef CONFIG_CMD_NET           /* bootp, tftpboot, rarpboot    */
 158#undef CONFIG_CMD_NFS           /* NFS support                  */
 159
 160#define CONFIG_SYS_NO_FLASH
 161#define CONFIG_HARD_I2C                 1
 162#define CONFIG_SYS_I2C_SPEED            100000
 163#define CONFIG_SYS_I2C_SLAVE            1
 164#define CONFIG_SYS_I2C_BUS              0
 165#define CONFIG_SYS_I2C_BUS_SELECT       1
 166#define CONFIG_I2C_MULTI_BUS            1
 167#define CONFIG_DRIVER_OMAP34XX_I2C      1
 168
 169/*
 170 * TWL4030
 171 */
 172#define CONFIG_TWL4030_POWER            1
 173#define CONFIG_TWL4030_LED              1
 174
 175/*
 176 * Board NAND Info.
 177 */
 178#define CONFIG_SYS_NAND_QUIET_TEST      1
 179#define CONFIG_NAND_OMAP_GPMC
 180#define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 181                                                        /* to access nand */
 182#define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 183                                                        /* to access nand at */
 184                                                        /* CS0 */
 185#define GPMC_NAND_ECC_LP_x16_LAYOUT     1
 186
 187#define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
 188                                                        /* devices */
 189#define CONFIG_JFFS2_NAND
 190/* nand device jffs2 lives on */
 191#define CONFIG_JFFS2_DEV                "nand0"
 192/* start of jffs2 partition */
 193#define CONFIG_JFFS2_PART_OFFSET        0x680000
 194#define CONFIG_JFFS2_PART_SIZE          0xf980000       /* size of jffs2 */
 195                                                        /* partition */
 196
 197/* Environment information */
 198#define CONFIG_BOOTDELAY                10
 199
 200#define CONFIG_EXTRA_ENV_SETTINGS \
 201        "loadaddr=0x82000000\0" \
 202        "usbtty=cdc_acm\0" \
 203        "console=ttyS2,115200n8\0" \
 204        "mpurate=auto\0" \
 205        "vram=12M\0" \
 206        "dvimode=1024x768MR-16@60\0" \
 207        "defaultdisplay=dvi\0" \
 208        "mmcdev=0\0" \
 209        "mmcroot=/dev/mmcblk0p2 rw\0" \
 210        "mmcrootfstype=ext3 rootwait\0" \
 211        "nandroot=/dev/mtdblock4 rw\0" \
 212        "nandrootfstype=jffs2\0" \
 213        "mmcargs=setenv bootargs console=${console} " \
 214                "mpurate=${mpurate} " \
 215                "vram=${vram} " \
 216                "omapfb.mode=dvi:${dvimode} " \
 217                "omapfb.debug=y " \
 218                "omapdss.def_disp=${defaultdisplay} " \
 219                "root=${mmcroot} " \
 220                "rootfstype=${mmcrootfstype}\0" \
 221        "nandargs=setenv bootargs console=${console} " \
 222                "mpurate=${mpurate} " \
 223                "vram=${vram} " \
 224                "omapfb.mode=dvi:${dvimode} " \
 225                "omapfb.debug=y " \
 226                "omapdss.def_disp=${defaultdisplay} " \
 227                "root=${nandroot} " \
 228                "rootfstype=${nandrootfstype}\0" \
 229        "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
 230        "importbootenv=echo Importing environment from mmc ...; " \
 231                "env import -t $loadaddr $filesize\0" \
 232        "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 233        "mmcboot=echo Booting from mmc ...; " \
 234                "run mmcargs; " \
 235                "bootm ${loadaddr}\0" \
 236        "nandboot=echo Booting from nand ...; " \
 237                "run nandargs; " \
 238                "nand read ${loadaddr} 280000 400000; " \
 239                "bootm ${loadaddr}\0" \
 240
 241#define CONFIG_BOOTCOMMAND \
 242        "if mmc rescan ${mmcdev}; then " \
 243                "echo SD/MMC found on device ${mmcdev};" \
 244                "if run loadbootenv; then " \
 245                        "run importbootenv;" \
 246                "fi;" \
 247                "if test -n $uenvcmd; then " \
 248                        "echo Running uenvcmd ...;" \
 249                        "run uenvcmd;" \
 250                "fi;" \
 251                "if run loaduimage; then " \
 252                        "run mmcboot;" \
 253                "fi;" \
 254        "fi;" \
 255        "run nandboot;" \
 256
 257#define CONFIG_AUTO_COMPLETE            1
 258/*
 259 * Miscellaneous configurable options
 260 */
 261#define CONFIG_SYS_LONGHELP             /* undef to save memory */
 262#define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 263#define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 264#define CONFIG_SYS_PROMPT               "OMAP3 beagleboard.org # "
 265#define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 266/* Print Buffer Size */
 267#define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 268                                        sizeof(CONFIG_SYS_PROMPT) + 16)
 269#define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 270/* Boot Argument Buffer Size */
 271#define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 272
 273#define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)     /* memtest */
 274                                                                /* works on */
 275#define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 276                                        0x01F00000) /* 31MB */
 277
 278#define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)     /* default */
 279                                                        /* load address */
 280
 281/*
 282 * OMAP3 has 12 GP timers, they can be driven by the system clock
 283 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 284 * This rate is divided by a local divisor.
 285 */
 286#define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
 287#define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 288#define CONFIG_SYS_HZ                   1000
 289
 290/*-----------------------------------------------------------------------
 291 * Stack sizes
 292 *
 293 * The stack sizes are set up in start.S using the settings below
 294 */
 295#define CONFIG_STACKSIZE        (128 << 10)     /* regular stack 128 KiB */
 296#ifdef CONFIG_USE_IRQ
 297#define CONFIG_STACKSIZE_IRQ    (4 << 10)       /* IRQ stack 4 KiB */
 298#define CONFIG_STACKSIZE_FIQ    (4 << 10)       /* FIQ stack 4 KiB */
 299#endif
 300
 301/*-----------------------------------------------------------------------
 302 * Physical Memory Map
 303 */
 304#define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 305#define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 306#define PHYS_SDRAM_1_SIZE       (32 << 20)      /* at least 32 MiB */
 307#define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 308
 309/* SDRAM Bank Allocation method */
 310#define SDRC_R_B_C              1
 311
 312/*-----------------------------------------------------------------------
 313 * FLASH and environment organization
 314 */
 315
 316/* **** PISMO SUPPORT *** */
 317
 318/* Configure the PISMO */
 319#define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 320#define PISMO1_ONEN_SIZE                GPMC_SIZE_128M
 321
 322#define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 323
 324#if defined(CONFIG_CMD_NAND)
 325#define CONFIG_SYS_FLASH_BASE           PISMO1_NAND_BASE
 326#endif
 327
 328/* Monitor at start of flash */
 329#define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 330#define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 331
 332#define CONFIG_ENV_IS_IN_NAND           1
 333#define ONENAND_ENV_OFFSET              0x260000 /* environment starts here */
 334#define SMNAND_ENV_OFFSET               0x260000 /* environment starts here */
 335
 336#define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 337#define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 338#define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 339
 340#define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 341#define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 342#define CONFIG_SYS_INIT_RAM_SIZE        0x800
 343#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 344                                         CONFIG_SYS_INIT_RAM_SIZE - \
 345                                         GENERATED_GBL_DATA_SIZE)
 346
 347#define CONFIG_OMAP3_SPI
 348
 349#endif /* __CONFIG_H */
 350