1/* 2 * (C) Copyright 2002 3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 4 * Alex Zuepke <azu@sysgo.de> 5 * 6 * Configuation settings for the Shannon/TuxScreen/IS2630 WebPhone Board. 7 * 8 * See file CREDITS for list of people who contributed to this 9 * project. 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; either version 2 of 14 * the License, or (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24 * MA 02111-1307 USA 25 */ 26 27#ifndef __CONFIG_H 28#define __CONFIG_H 29 30/* 31 * Since we use the Inferno-Loader to bring us to live, 32 * we skip the lowlevel init stuff. 33 * But U-Boot still relocates itself into RAM 34 */ 35#define CONFIG_INFERNO /* we are using the inferno bootldr */ 36#define CONFIG_SKIP_LOWLEVEL_INIT 1 37 38/* 39 * High Level Configuration Options 40 * (easy to change) 41 */ 42#define CONFIG_SA1100 1 /* This is an SA1100 CPU */ 43#define CONFIG_SHANNON 1 /* on an SHANNON/TuxScreen Board */ 44 45#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ 46/* we will never enable dcache, because we have to setup MMU first */ 47#define CONFIG_SYS_NO_DCACHE 48 49/* 50 * Size of malloc() pool 51 */ 52#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) 53 54/* 55 * Hardware drivers 56 */ 57#define CONFIG_DRIVER_3C589 1 58 59/* 60 * select serial console configuration 61 */ 62#define CONFIG_SA1100_SERIAL 63#define CONFIG_SERIAL3 1 /* we use SERIAL 3 */ 64 65/* allow to overwrite serial and ethaddr */ 66#define CONFIG_ENV_OVERWRITE 67 68#define CONFIG_BAUDRATE 115200 69 70 71/* 72 * BOOTP options 73 */ 74#define CONFIG_BOOTP_BOOTFILESIZE 75#define CONFIG_BOOTP_BOOTPATH 76#define CONFIG_BOOTP_GATEWAY 77#define CONFIG_BOOTP_HOSTNAME 78 79 80/* 81 * Command line configuration. 82 */ 83#include <config_cmd_default.h> 84 85 86#define CONFIG_BOOTDELAY 3 87#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,115200" 88#define CONFIG_NETMASK 255.255.0.0 89#define CONFIG_BOOTCOMMAND "help" 90 91#if defined(CONFIG_CMD_KGDB) 92#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ 93#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ 94#endif 95 96/* 97 * Miscellaneous configurable options 98 */ 99#define CONFIG_SYS_LONGHELP /* undef to save memory */ 100#define CONFIG_SYS_PROMPT "TuxScreen # " /* Monitor Command Prompt */ 101#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 102#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 103#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 104#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 105 106#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */ 107#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */ 108 109#define CONFIG_SYS_LOAD_ADDR 0xd0000000 /* default load address */ 110 111#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ 112#define CONFIG_SYS_CPUSPEED 0x09 /* 190 MHz for Shannon */ 113 114 /* valid baudrates */ 115#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 116 117#define CONFIG_DOS_PARTITION 1 /* DOS partitiion support */ 118 119/*----------------------------------------------------------------------- 120 * Stack sizes 121 * 122 * The stack sizes are set up in start.S using the settings below 123 */ 124#define CONFIG_STACKSIZE (128*1024) /* regular stack */ 125#ifdef CONFIG_USE_IRQ 126#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ 127#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ 128#endif 129 130/*----------------------------------------------------------------------- 131 * Physical Memory Map 132 */ 133/* BE CAREFUL */ 134#define CONFIG_NR_DRAM_BANKS 4 /* we have 4 banks of EDORAM */ 135#define PHYS_SDRAM_1 0xc0000000 /* RAM Bank #1 */ 136#define PHYS_SDRAM_1_SIZE 0x00400000 /* 4 MB */ 137#define PHYS_SDRAM_2 0xc8000000 /* RAM Bank #2 */ 138#define PHYS_SDRAM_2_SIZE 0x00400000 /* 4 MB */ 139#define PHYS_SDRAM_3 0xd0000000 /* RAM Bank #3 */ 140#define PHYS_SDRAM_3_SIZE 0x00400000 /* 4 MB */ 141#define PHYS_SDRAM_4 0xd8000000 /* RAM Bank #4 */ 142#define PHYS_SDRAM_4_SIZE 0x00400000 /* 4 MB */ 143 144 145#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ 146#define PHYS_FLASH_SIZE 0x00400000 /* 4 MB */ 147 148#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 149 150/*----------------------------------------------------------------------- 151 * FLASH and environment organization 152 */ 153#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 154#define CONFIG_SYS_MAX_FLASH_SECT (31+4) /* max number of sectors on one chip */ 155 156/* timeout values are in ticks */ 157#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ 158#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ 159 160#define CONFIG_ENV_IS_IN_FLASH 1 161#ifdef CONFIG_INFERNO 162/* we take the last sector, 128 KB in size, but we only use 16 KB of it for stack reasons */ 163#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x003E0000) /* Addr of Environment Sector */ 164#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment */ 165#define CONFIG_ENV_SECT_SIZE (128 << 10) /* size of environment sector */ 166#else 167#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */ 168#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment */ 169#endif 170 171/*----------------------------------------------------------------------- 172 * PCMCIA stuff 173 *----------------------------------------------------------------------- 174 * 175 */ 176 177/* we pick the upper one */ 178 179#define CONFIG_PCMCIA_SLOT_A 180 181#define CONFIG_SYS_PCMCIA_IO_ADDR (0x20000000) 182#define CONFIG_SYS_PCMCIA_IO_SIZE ( 64 << 20 ) 183#define CONFIG_SYS_PCMCIA_DMA_ADDR (0x24000000) 184#define CONFIG_SYS_PCMCIA_DMA_SIZE ( 64 << 20 ) 185#define CONFIG_SYS_PCMCIA_ATTRB_ADDR (0x2C000000) 186#define CONFIG_SYS_PCMCIA_ATTRB_SIZE ( 64 << 20 ) 187#define CONFIG_SYS_PCMCIA_MEM_ADDR (0x28000000) 188#define CONFIG_SYS_PCMCIA_MEM_SIZE ( 64 << 20 ) 189 190/* in fact, MEM and ATTRB are swapped - has to be corrected soon in cmd_pcmcia or so */ 191 192/*----------------------------------------------------------------------- 193 * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter) 194 *----------------------------------------------------------------------- 195 */ 196 197#define CONFIG_IDE_PCCARD 1 /* Use IDE with PC Card Adapter */ 198 199#undef CONFIG_IDE_PCMCIA /* Direct IDE not supported */ 200#undef CONFIG_IDE_LED /* LED for ide not supported */ 201#undef CONFIG_IDE_RESET /* reset for ide not supported */ 202 203#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */ 204#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */ 205 206#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 207 208/* it's simple, all regs are in I/O space */ 209#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_ATTRB_ADDR 210 211/* Offset for data I/O */ 212#define CONFIG_SYS_ATA_DATA_OFFSET 0 213 214/* Offset for normal register accesses */ 215#define CONFIG_SYS_ATA_REG_OFFSET 0 216 217/* Offset for alternate registers */ 218#define CONFIG_SYS_ATA_ALT_OFFSET 0 219 220/*----------------------------------------------------------------------- 221 */ 222 223#endif /* __CONFIG_H */ 224