LXR uboot/include/galileo/pci.h

   1/* PCI.h - PCI functions header file */
   2
   3/* Copyright - Galileo technology. */
   4
   5#ifndef __INCpcih
   6#define __INCpcih
   7
   8/* includes */
   9
  10#include "core.h"
  11#include "memory.h"
  12
  13/* According to PCI REV 2.1 MAX agents allowed on the bus are -21- */
  14#define PCI_MAX_DEVICES 22
  15
  16
  17/* Macros */
  18#define     SELF                    32
  19
  20/* Defines for the access regions. */
  21#define     PREFETCH_ENABLE                 BIT12
  22#define     PREFETCH_DISABLE                NO_BIT
  23#define     DELAYED_READ_ENABLE             BIT13
  24/* #define     CACHING_ENABLE                  BIT14 */
  25/* aggressive prefetch: PCI slave prefetch two burst in advance*/
  26#define     AGGRESSIVE_PREFETCH              BIT16
  27/* read line aggresive prefetch: PCI slave prefetch two burst in advance*/
  28#define     READ_LINE_AGGRESSIVE_PREFETCH   BIT17
  29/* read multiple aggresive prefetch: PCI slave prefetch two burst in advance*/
  30#define     READ_MULTI_AGGRESSIVE_PREFETCH  BIT18
  31#define     MAX_BURST_4                     NO_BIT
  32#define     MAX_BURST_8                     BIT20  /* Bits[21:20] = 01 */
  33#define     MAX_BURST_16                    BIT21  /* Bits[21:20] = 10 */
  34#define     PCI_BYTE_SWAP                   NO_BIT /* Bits[25:24] = 00 */
  35#define     PCI_NO_SWAP                     BIT24  /* Bits[25:24] = 01 */
  36#define     PCI_BYTE_AND_WORD_SWAP          BIT25  /* Bits[25:24] = 10 */
  37#define     PCI_WORD_SWAP                  (BIT24 | BIT25) /* Bits[25:24] = 11 */
  38#define     PCI_ACCESS_PROTECT              BIT28
  39#define     PCI_WRITE_PROTECT               BIT29
  40
  41/* typedefs */
  42
  43typedef enum __pciAccessRegions{REGION0,REGION1,REGION2,REGION3,REGION4,REGION5,
  44                                REGION6,REGION7} PCI_ACCESS_REGIONS;
  45
  46typedef enum __pciAgentPrio{LOW_AGENT_PRIO,HI_AGENT_PRIO} PCI_AGENT_PRIO;
  47typedef enum __pciAgentPark{PARK_ON_AGENT,DONT_PARK_ON_AGENT} PCI_AGENT_PARK;
  48
  49typedef enum __pciSnoopType{PCI_NO_SNOOP,PCI_SNOOP_WT,PCI_SNOOP_WB}
  50                            PCI_SNOOP_TYPE;
  51typedef enum __pciSnoopRegion{PCI_SNOOP_REGION0,PCI_SNOOP_REGION1,
  52                              PCI_SNOOP_REGION2,PCI_SNOOP_REGION3}
  53                              PCI_SNOOP_REGION;
  54
  55typedef enum __memPciHost{PCI_HOST0,PCI_HOST1} PCI_HOST;
  56typedef enum __memPciRegion{PCI_REGION0,PCI_REGION1,
  57                         PCI_REGION2,PCI_REGION3,
  58                         PCI_IO}
  59                         PCI_REGION;
  60
  61/* read/write configuration registers on local PCI bus. */
  62void pciWriteConfigReg(PCI_HOST host, unsigned int regOffset,
  63                       unsigned int pciDevNum, unsigned int data);
  64unsigned int pciReadConfigReg (PCI_HOST host, unsigned int regOffset,
  65                               unsigned int pciDevNum);
  66
  67/* read/write configuration registers on another PCI bus. */
  68void pciOverBridgeWriteConfigReg(PCI_HOST host,
  69                                 unsigned int regOffset,
  70                                 unsigned int pciDevNum,
  71                                 unsigned int busNum,unsigned int data);
  72unsigned int pciOverBridgeReadConfigReg(PCI_HOST host,
  73                                        unsigned int regOffset,
  74                                        unsigned int pciDevNum,
  75                                        unsigned int busNum);
  76
  77/*      Master`s memory space   */
  78bool pciMapSpace(PCI_HOST host, PCI_REGION region,
  79                unsigned int remapBase,
  80                unsigned int deviceBase,
  81                unsigned int deviceLength);
  82unsigned int pciGetSpaceBase(PCI_HOST host, PCI_REGION region);
  83unsigned int pciGetSpaceSize(PCI_HOST host, PCI_REGION region);
  84
  85/*      Slave`s memory space   */
  86void pciMapMemoryBank(PCI_HOST host, MEMORY_BANK bank,
  87                      unsigned int pci0Dram0Base, unsigned int pci0Dram0Size);
  88
  89/* PCI region options */
  90
  91bool  pciSetRegionFeatures(PCI_HOST host, PCI_ACCESS_REGIONS region,
  92        unsigned int features, unsigned int baseAddress,
  93        unsigned int regionLength);
  94
  95void  pciDisableAccessRegion(PCI_HOST host, PCI_ACCESS_REGIONS region);
  96
  97/* PCI arbiter */
  98
  99bool pciArbiterEnable(PCI_HOST host);
 100bool pciArbiterDisable(PCI_HOST host);
 101bool pciParkingDisable(PCI_HOST host, PCI_AGENT_PARK internalAgent,
 102                        PCI_AGENT_PARK externalAgent0,
 103                        PCI_AGENT_PARK externalAgent1,
 104                        PCI_AGENT_PARK externalAgent2,
 105                        PCI_AGENT_PARK externalAgent3,
 106                        PCI_AGENT_PARK externalAgent4,
 107                        PCI_AGENT_PARK externalAgent5);
 108bool pciSetRegionSnoopMode(PCI_HOST host, PCI_SNOOP_REGION region,
 109                            PCI_SNOOP_TYPE snoopType,
 110                            unsigned int baseAddress,
 111                            unsigned int regionLength);
 112
 113#endif /* __INCpcih */
 114