LXR uboot/arch/arm/cpu/arm925t/start.S

   1/*
   2 *  armboot - Startup Code for ARM925 CPU-core
   3 *
   4 *  Copyright (c) 2003  Texas Instruments
   5 *
   6 *  ----- Adapted for OMAP1510 from ARM920 code ------
   7 *
   8 *  Copyright (c) 2001  Marius Gröger <mag@sysgo.de>
   9 *  Copyright (c) 2002  Alex Züpke <azu@sysgo.de>
  10 *  Copyright (c) 2002  Gary Jennejohn <garyj@denx.de>
  11 *  Copyright (c) 2003  Richard Woodruff <r-woodruff2@ti.com>
  12 *  Copyright (c) 2003  Kshitij  <kshitij@ti.com>
  13 *
  14 * See file CREDITS for list of people who contributed to this
  15 * project.
  16 *
  17 * This program is free software; you can redistribute it and/or
  18 * modify it under the terms of the GNU General Public License as
  19 * published by the Free Software Foundation; either version 2 of
  20 * the License, or (at your option) any later version.
  21 *
  22 * This program is distributed in the hope that it will be useful,
  23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25 * GNU General Public License for more details.
  26 *
  27 * You should have received a copy of the GNU General Public License
  28 * along with this program; if not, write to the Free Software
  29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30 * MA 02111-1307 USA
  31 */
  32
  33#include <asm-offsets.h>
  34#include <config.h>
  35#include <version.h>
  36
  37#if defined(CONFIG_OMAP1510)
  38#include <./configs/omap1510.h>
  39#endif
  40
  41/*
  42 *************************************************************************
  43 *
  44 * Jump vector table as in table 3.1 in [1]
  45 *
  46 *************************************************************************
  47 */
  48
  49
  50.globl _start
  51_start: b       reset
  52        ldr     pc, _undefined_instruction
  53        ldr     pc, _software_interrupt
  54        ldr     pc, _prefetch_abort
  55        ldr     pc, _data_abort
  56        ldr     pc, _not_used
  57        ldr     pc, _irq
  58        ldr     pc, _fiq
  59
  60_undefined_instruction: .word undefined_instruction
  61_software_interrupt:    .word software_interrupt
  62_prefetch_abort:        .word prefetch_abort
  63_data_abort:            .word data_abort
  64_not_used:              .word not_used
  65_irq:                   .word irq
  66_fiq:                   .word fiq
  67
  68        .balignl 16,0xdeadbeef
  69
  70
  71/*
  72 *************************************************************************
  73 *
  74 * Startup Code (reset vector)
  75 *
  76 * do important init only if we don't start from memory!
  77 * setup Memory and board specific bits prior to relocation.
  78 * relocate armboot to ram
  79 * setup stack
  80 *
  81 *************************************************************************
  82 */
  83
  84.globl _TEXT_BASE
  85_TEXT_BASE:
  86        .word   CONFIG_SYS_TEXT_BASE
  87
  88/*
  89 * These are defined in the board-specific linker script.
  90 * Subtracting _start from them lets the linker put their
  91 * relative position in the executable instead of leaving
  92 * them null.
  93 */
  94.globl _bss_start_ofs
  95_bss_start_ofs:
  96        .word __bss_start - _start
  97
  98.globl _bss_end_ofs
  99_bss_end_ofs:
 100        .word __bss_end__ - _start
 101
 102.globl _end_ofs
 103_end_ofs:
 104        .word _end - _start
 105
 106#ifdef CONFIG_USE_IRQ
 107/* IRQ stack memory (calculated at run-time) */
 108.globl IRQ_STACK_START
 109IRQ_STACK_START:
 110        .word   0x0badc0de
 111
 112/* IRQ stack memory (calculated at run-time) */
 113.globl FIQ_STACK_START
 114FIQ_STACK_START:
 115        .word 0x0badc0de
 116#endif
 117
 118/* IRQ stack memory (calculated at run-time) + 8 bytes */
 119.globl IRQ_STACK_START_IN
 120IRQ_STACK_START_IN:
 121        .word   0x0badc0de
 122
 123/*
 124 * the actual reset code
 125 */
 126
 127reset:
 128        /*
 129         * set the cpu to SVC32 mode
 130         */
 131        mrs     r0,cpsr
 132        bic     r0,r0,#0x1f
 133        orr     r0,r0,#0xd3
 134        msr     cpsr,r0
 135
 136        /*
 137         * Set up 925T mode
 138         */
 139        mov r1, #0x81               /* Set ARM925T configuration. */
 140        mcr p15, 0, r1, c15, c1, 0  /* Write ARM925T configuration register. */
 141
 142        /*
 143         * turn off the watchdog, unlock/diable sequence
 144         */
 145        mov  r1, #0xF5
 146        ldr  r0, =WDTIM_MODE
 147        strh r1, [r0]
 148        mov  r1, #0xA0
 149        strh r1, [r0]
 150
 151        /*
 152         * mask all IRQs by setting all bits in the INTMR - default
 153         */
 154        mov r1, #0xffffffff
 155        ldr r0, =REG_IHL1_MIR
 156        str r1, [r0]
 157        ldr r0, =REG_IHL2_MIR
 158        str r1, [r0]
 159
 160        /*
 161         * wait for dpll to lock
 162         */
 163        ldr  r0, =CK_DPLL1
 164        mov  r1, #0x10
 165        strh r1, [r0]
 166poll1:
 167        ldrh r1, [r0]
 168        ands r1, r1, #0x01
 169        beq poll1
 170
 171        /*
 172         * we do sys-critical inits only at reboot,
 173         * not when booting from ram!
 174         */
 175#ifndef CONFIG_SKIP_LOWLEVEL_INIT
 176        bl  cpu_init_crit
 177#endif
 178
 179/* Set stackpointer in internal RAM to call board_init_f */
 180call_board_init_f:
 181        ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
 182        bic     sp, sp, #7 /* 8-byte alignment for ABI compliance */
 183        ldr     r0,=0x00000000
 184        bl      board_init_f
 185
 186/*------------------------------------------------------------------------------*/
 187
 188/*
 189 * void relocate_code (addr_sp, gd, addr_moni)
 190 *
 191 * This "function" does not return, instead it continues in RAM
 192 * after relocating the monitor code.
 193 *
 194 */
 195        .globl  relocate_code
 196relocate_code:
 197        mov     r4, r0  /* save addr_sp */
 198        mov     r5, r1  /* save addr of gd */
 199        mov     r6, r2  /* save addr of destination */
 200
 201        /* Set up the stack                                                 */
 202stack_setup:
 203        mov     sp, r4
 204
 205        adr     r0, _start
 206        cmp     r0, r6
 207        beq     clear_bss               /* skip relocation */
 208        mov     r1, r6                  /* r1 <- scratch for copy_loop */
 209        ldr     r3, _bss_start_ofs
 210        add     r2, r0, r3              /* r2 <- source end address         */
 211
 212copy_loop:
 213        ldmia   r0!, {r9-r10}           /* copy from source address [r0]    */
 214        stmia   r1!, {r9-r10}           /* copy to   target address [r1]    */
 215        cmp     r0, r2                  /* until source end address [r2]    */
 216        blo     copy_loop
 217
 218#ifndef CONFIG_SPL_BUILD
 219        /*
 220         * fix .rel.dyn relocations
 221         */
 222        ldr     r0, _TEXT_BASE          /* r0 <- Text base */
 223        sub     r9, r6, r0              /* r9 <- relocation offset */
 224        ldr     r10, _dynsym_start_ofs  /* r10 <- sym table ofs */
 225        add     r10, r10, r0            /* r10 <- sym table in FLASH */
 226        ldr     r2, _rel_dyn_start_ofs  /* r2 <- rel dyn start ofs */
 227        add     r2, r2, r0              /* r2 <- rel dyn start in FLASH */
 228        ldr     r3, _rel_dyn_end_ofs    /* r3 <- rel dyn end ofs */
 229        add     r3, r3, r0              /* r3 <- rel dyn end in FLASH */
 230fixloop:
 231        ldr     r0, [r2]                /* r0 <- location to fix up, IN FLASH! */
 232        add     r0, r0, r9              /* r0 <- location to fix up in RAM */
 233        ldr     r1, [r2, #4]
 234        and     r7, r1, #0xff
 235        cmp     r7, #23                 /* relative fixup? */
 236        beq     fixrel
 237        cmp     r7, #2                  /* absolute fixup? */
 238        beq     fixabs
 239        /* ignore unknown type of fixup */
 240        b       fixnext
 241fixabs:
 242        /* absolute fix: set location to (offset) symbol value */
 243        mov     r1, r1, LSR #4          /* r1 <- symbol index in .dynsym */
 244        add     r1, r10, r1             /* r1 <- address of symbol in table */
 245        ldr     r1, [r1, #4]            /* r1 <- symbol value */
 246        add     r1, r1, r9              /* r1 <- relocated sym addr */
 247        b       fixnext
 248fixrel:
 249        /* relative fix: increase location by offset */
 250        ldr     r1, [r0]
 251        add     r1, r1, r9
 252fixnext:
 253        str     r1, [r0]
 254        add     r2, r2, #8              /* each rel.dyn entry is 8 bytes */
 255        cmp     r2, r3
 256        blo     fixloop
 257#endif
 258
 259clear_bss:
 260#ifndef CONFIG_SPL_BUILD
 261        ldr     r0, _bss_start_ofs
 262        ldr     r1, _bss_end_ofs
 263        mov     r4, r6                  /* reloc addr */
 264        add     r0, r0, r4
 265        add     r1, r1, r4
 266        mov     r2, #0x00000000         /* clear                            */
 267
 268clbss_l:str     r2, [r0]                /* clear loop...                    */
 269        add     r0, r0, #4
 270        cmp     r0, r1
 271        bne     clbss_l
 272
 273        bl coloured_LED_init
 274        bl red_led_on
 275#endif
 276
 277/*
 278 * We are done. Do not return, instead branch to second part of board
 279 * initialization, now running from RAM.
 280 */
 281#ifdef CONFIG_NAND_SPL
 282        ldr     r0, _nand_boot_ofs
 283        mov     pc, r0
 284
 285_nand_boot_ofs:
 286        .word nand_boot
 287#else
 288        ldr     r0, _board_init_r_ofs
 289        adr     r1, _start
 290        add     lr, r0, r1
 291        add     lr, lr, r9
 292        /* setup parameters for board_init_r */
 293        mov     r0, r5          /* gd_t */
 294        mov     r1, r6          /* dest_addr */
 295        /* jump to it ... */
 296        mov     pc, lr
 297
 298_board_init_r_ofs:
 299        .word board_init_r - _start
 300#endif
 301
 302_rel_dyn_start_ofs:
 303        .word __rel_dyn_start - _start
 304_rel_dyn_end_ofs:
 305        .word __rel_dyn_end - _start
 306_dynsym_start_ofs:
 307        .word __dynsym_start - _start
 308
 309/*
 310 *************************************************************************
 311 *
 312 * CPU_init_critical registers
 313 *
 314 * setup important registers
 315 * setup memory timing
 316 *
 317 *************************************************************************
 318 */
 319
 320
 321cpu_init_crit:
 322        /*
 323         * flush v4 I/D caches
 324         */
 325        mov     r0, #0
 326        mcr     p15, 0, r0, c7, c7, 0   /* flush v3/v4 cache */
 327        mcr     p15, 0, r0, c8, c7, 0   /* flush v4 TLB */
 328
 329        /*
 330         * disable MMU stuff and caches
 331         */
 332        mrc     p15, 0, r0, c1, c0, 0
 333        bic     r0, r0, #0x00002300     @ clear bits 13, 9:8 (--V- --RS)
 334        bic     r0, r0, #0x00000087     @ clear bits 7, 2:0 (B--- -CAM)
 335        orr     r0, r0, #0x00000002     @ set bit 2 (A) Align
 336        orr     r0, r0, #0x00001000     @ set bit 12 (I) I-Cache
 337        mcr     p15, 0, r0, c1, c0, 0
 338
 339        /*
 340         * Go setup Memory and board specific bits prior to relocation.
 341         */
 342        mov     ip, lr          /* perserve link reg across call */
 343        bl      lowlevel_init   /* go setup pll,mux,memory */
 344        mov     lr, ip          /* restore link */
 345        mov     pc, lr          /* back to my caller */
 346/*
 347 *************************************************************************
 348 *
 349 * Interrupt handling
 350 *
 351 *************************************************************************
 352 */
 353
 354@
 355@ IRQ stack frame.
 356@
 357#define S_FRAME_SIZE    72
 358
 359#define S_OLD_R0        68
 360#define S_PSR           64
 361#define S_PC            60
 362#define S_LR            56
 363#define S_SP            52
 364
 365#define S_IP            48
 366#define S_FP            44
 367#define S_R10           40
 368#define S_R9            36
 369#define S_R8            32
 370#define S_R7            28
 371#define S_R6            24
 372#define S_R5            20
 373#define S_R4            16
 374#define S_R3            12
 375#define S_R2            8
 376#define S_R1            4
 377#define S_R0            0
 378
 379#define MODE_SVC 0x13
 380#define I_BIT    0x80
 381
 382/*
 383 * use bad_save_user_regs for abort/prefetch/undef/swi ...
 384 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
 385 */
 386
 387        .macro  bad_save_user_regs
 388        sub     sp, sp, #S_FRAME_SIZE           @ carve out a frame on current user stack
 389        stmia   sp, {r0 - r12}                  @ Save user registers (now in svc mode) r0-r12
 390
 391        ldr     r2, IRQ_STACK_START_IN
 392        ldmia   r2, {r2 - r3}                   @ get values for "aborted" pc and cpsr (into parm regs)
 393        add     r0, sp, #S_FRAME_SIZE           @ grab pointer to old stack
 394
 395        add     r5, sp, #S_SP
 396        mov     r1, lr
 397        stmia   r5, {r0 - r3}                   @ save sp_SVC, lr_SVC, pc, cpsr
 398        mov     r0, sp                          @ save current stack into r0 (param register)
 399        .endm
 400
 401        .macro  irq_save_user_regs
 402        sub     sp, sp, #S_FRAME_SIZE
 403        stmia   sp, {r0 - r12}                  @ Calling r0-r12
 404        add     r8, sp, #S_PC                   @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
 405        stmdb   r8, {sp, lr}^                   @ Calling SP, LR
 406        str     lr, [r8, #0]                    @ Save calling PC
 407        mrs     r6, spsr
 408        str     r6, [r8, #4]                    @ Save CPSR
 409        str     r0, [r8, #8]                    @ Save OLD_R0
 410        mov     r0, sp
 411        .endm
 412
 413        .macro  irq_restore_user_regs
 414        ldmia   sp, {r0 - lr}^                  @ Calling r0 - lr
 415        mov     r0, r0
 416        ldr     lr, [sp, #S_PC]                 @ Get PC
 417        add     sp, sp, #S_FRAME_SIZE
 418        subs    pc, lr, #4                      @ return & move spsr_svc into cpsr
 419        .endm
 420
 421        .macro get_bad_stack
 422        ldr     r13, IRQ_STACK_START_IN
 423
 424        str     lr, [r13]                       @ save caller lr in position 0 of saved stack
 425        mrs     lr, spsr                        @ get the spsr
 426        str     lr, [r13, #4]                   @ save spsr in position 1 of saved stack
 427
 428        mov     r13, #MODE_SVC                  @ prepare SVC-Mode
 429        @ msr   spsr_c, r13
 430        msr     spsr, r13                       @ switch modes, make sure moves will execute
 431        mov     lr, pc                          @ capture return pc
 432        movs    pc, lr                          @ jump to next instruction & switch modes.
 433        .endm
 434
 435        .macro get_irq_stack                    @ setup IRQ stack
 436        ldr     sp, IRQ_STACK_START
 437        .endm
 438
 439        .macro get_fiq_stack                    @ setup FIQ stack
 440        ldr     sp, FIQ_STACK_START
 441        .endm
 442
 443/*
 444 * exception handlers
 445 */
 446        .align  5
 447undefined_instruction:
 448        get_bad_stack
 449        bad_save_user_regs
 450        bl      do_undefined_instruction
 451
 452        .align  5
 453software_interrupt:
 454        get_bad_stack
 455        bad_save_user_regs
 456        bl      do_software_interrupt
 457
 458        .align  5
 459prefetch_abort:
 460        get_bad_stack
 461        bad_save_user_regs
 462        bl      do_prefetch_abort
 463
 464        .align  5
 465data_abort:
 466        get_bad_stack
 467        bad_save_user_regs
 468        bl      do_data_abort
 469
 470        .align  5
 471not_used:
 472        get_bad_stack
 473        bad_save_user_regs
 474        bl      do_not_used
 475
 476#ifdef CONFIG_USE_IRQ
 477
 478        .align  5
 479irq:
 480        get_irq_stack
 481        irq_save_user_regs
 482        bl      do_irq
 483        irq_restore_user_regs
 484
 485        .align  5
 486fiq:
 487        get_fiq_stack
 488        /* someone ought to write a more effiction fiq_save_user_regs */
 489        irq_save_user_regs
 490        bl      do_fiq
 491        irq_restore_user_regs
 492
 493#else
 494
 495        .align  5
 496irq:
 497        get_bad_stack
 498        bad_save_user_regs
 499        bl      do_irq
 500
 501        .align  5
 502fiq:
 503        get_bad_stack
 504        bad_save_user_regs
 505        bl      do_fiq
 506
 507#endif
 508
 509        .align  5
 510.globl reset_cpu
 511reset_cpu:
 512        ldr     r1, rstctl1     /* get clkm1 reset ctl */
 513        mov     r3, #0x3        /* dsp_en + arm_rst = global reset */
 514        strh    r3, [r1]        /* force reset */
 515        mov     r0, r0
 516_loop_forever:
 517        b       _loop_forever
 518rstctl1:
 519        .word   0xfffece10
 520