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12#include <common.h>
13#include <command.h>
14#include <asm/blackfin.h>
15#include <asm/cplb.h>
16#include <asm/mach-common/bits/core.h>
17#include <asm/mach-common/bits/ebiu.h>
18#include <asm/mach-common/bits/trace.h>
19
20#include "cpu.h"
21#include "serial.h"
22#include "initcode.h"
23
24ulong bfin_poweron_retx;
25
26__attribute__ ((__noreturn__))
27void cpu_init_f(ulong bootflag, ulong loaded_from_ldr)
28{
29#ifndef CONFIG_BFIN_BOOTROM_USES_EVT1
30
31 char nops[0xC];
32 serial_early_puts("NOP Slide\n");
33 memset(nops, 0x00, sizeof(nops));
34 memcpy((void *)L1_INST_SRAM, nops, sizeof(nops));
35#endif
36
37 if (!loaded_from_ldr) {
38
39
40
41
42 serial_early_puts("L1 Relocate\n");
43 extern char _stext_l1[], _text_l1_lma[], _text_l1_len[];
44 memcpy(&_stext_l1, &_text_l1_lma, (unsigned long)_text_l1_len);
45 extern char _sdata_l1[], _data_l1_lma[], _data_l1_len[];
46 memcpy(&_sdata_l1, &_data_l1_lma, (unsigned long)_data_l1_len);
47 }
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56
57 program_async_controller(NULL);
58
59
60 bfin_poweron_retx = bootflag;
61
62#ifdef CONFIG_DEBUG_DUMP
63
64 bfin_write_TBUFCTL(TBUFPWR | TBUFEN);
65#endif
66
67#ifndef CONFIG_PANIC_HANG
68
69
70
71 bfin_write_SWRST(DOUBLE_FAULT);
72#endif
73
74 serial_early_puts("Board init flash\n");
75 board_init_f(bootflag);
76}
77
78int exception_init(void)
79{
80 bfin_write_EVT3(trap);
81 return 0;
82}
83
84int irq_init(void)
85{
86#ifdef SIC_IMASK0
87 bfin_write_SIC_IMASK0(0);
88 bfin_write_SIC_IMASK1(0);
89# ifdef SIC_IMASK2
90 bfin_write_SIC_IMASK2(0);
91# endif
92#elif defined(SICA_IMASK0)
93 bfin_write_SICA_IMASK0(0);
94 bfin_write_SICA_IMASK1(0);
95#else
96 bfin_write_SIC_IMASK(0);
97#endif
98
99 if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS || ANOMALY_05000219)
100 bfin_write_EVT2(evt_nmi);
101 bfin_write_EVT5(evt_default);
102 bfin_write_EVT6(evt_default);
103 bfin_write_EVT7(evt_default);
104 bfin_write_EVT8(evt_default);
105 bfin_write_EVT9(evt_default);
106 bfin_write_EVT10(evt_default);
107 bfin_write_EVT11(evt_default);
108 bfin_write_EVT12(evt_default);
109 bfin_write_EVT13(evt_default);
110 bfin_write_EVT14(evt_default);
111 bfin_write_EVT15(evt_default);
112 bfin_write_ILAT(0);
113 CSYNC();
114
115 irq_flags = 0x3f;
116 local_irq_enable();
117 return 0;
118}
119