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25#include <common.h>
26#include <linux/ctype.h>
27#include <pci.h>
28#include <net.h>
29#include <mpc106.h>
30#include <w83c553f.h>
31#include "srom.h"
32
33
34extern char console_buffer[CONFIG_SYS_CBSIZE];
35extern int l2_cache_enable (int l2control);
36extern void *nvram_read (void *dest, const short src, size_t count);
37extern void nvram_write (short dest, const void *src, size_t count);
38
39
40unsigned int ata_reset_time = 60;
41unsigned int scsi_reset_time = 10;
42unsigned int eltec_board;
43
44
45
46
47unsigned short scsi_dev_id = PCI_DEVICE_ID_NCR_53C875;
48unsigned int scsi_max_scsi_id = 15;
49unsigned char scsi_sym53c8xx_ccf = 0x13;
50
51
52
53
54
55
56
57
58int misc_init_r (void)
59{
60 revinfo eerev;
61 char *ptr;
62 u_int i, l, initSrom, copyNv;
63 char buf[256];
64 char hex[23] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 0, 0,
65 0, 0, 0, 0, 10, 11, 12, 13, 14, 15 };
66 pci_dev_t bdf;
67
68 char sromSYM[] = {
69#ifdef TULIP_BUG
70
71 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
72 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
73 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00,
74 0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08,
75 0x02, 0x86, 0x02, 0x00, 0xaf, 0x08, 0xa5, 0x00,
76 0x88, 0x04, 0x03, 0x27, 0x08, 0x25, 0x00, 0x61,
77 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
78 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
79 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
80 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
81 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
82 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
83 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
84 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
85 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
86 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc6, 0xe8
87#endif
88
89 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
90 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
91 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00,
92 0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08,
93 0x04, 0x86, 0x02, 0x00, 0xaf, 0x08, 0xa5, 0x00,
94 0x86, 0x02, 0x04, 0xaf, 0x08, 0xa5, 0x00, 0x88,
95 0x04, 0x03, 0x27, 0x08, 0x25, 0x00, 0x61, 0x80,
96 0x88, 0x04, 0x05, 0x27, 0x08, 0x25, 0x00, 0x61,
97 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
98 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
99 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
100 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
101 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
102 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
103 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
104 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x77
105 };
106
107 char sromMII[] = {
108 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
109 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
110 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x5b, 0x00,
111 0x2e, 0x4d, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08,
112 0x01, 0x95, 0x03, 0x00, 0x00, 0x04, 0x01, 0x08,
113 0x00, 0x00, 0x02, 0x08, 0x02, 0x00, 0x00, 0x78,
114 0xe0, 0x01, 0x00, 0x50, 0x00, 0x18, 0x80, 0x00,
115 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
116 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
117 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
118 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
119 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
120 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
121 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
122 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
123 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xde, 0x41
124 };
125
126
127
128
129 initSrom = 0;
130 copyNv = 0;
131
132
133 el_srom_load (0x0000, (u_char*)&eerev, sizeof(revinfo),
134 SECOND_DEVICE, FIRST_BLOCK);
135
136
137 nvram_read (buf, CONFIG_SYS_NV_SROM_COPY_ADDR, CONFIG_SYS_SROM_SIZE);
138
139 if (strcmp (eerev.magic, "ELTEC") != 0)
140 {
141
142 for (i = 0, ptr = (char *)&eerev; i < sizeof(revinfo); i++)
143 *ptr++ = 0x00;
144 strcpy(eerev.magic, "ELTEC");
145 eerev.revrev[0] = 1;
146 eerev.revrev[1] = 0;
147 eerev.size = 0x00E0;
148 eerev.category[0] = 0x01;
149
150
151 eerev.etheraddr[0] = 0x00;
152 eerev.etheraddr[1] = 0x00;
153 eerev.etheraddr[2] = 0x5B;
154 eerev.etheraddr[3] = 0x00;
155 eerev.etheraddr[4] = 0x2E;
156 eerev.etheraddr[5] = 0x4D;
157
158
159 *(int*)&eerev.res[0] = CLK2P0TO1_1MB_PB_0P5DH;
160
161 initSrom = 1;
162 copyNv = 1;
163 }
164
165 if ((copyNv == 0) && (el_srom_checksum((u_char*)&eerev, CONFIG_SYS_SROM_SIZE) !=
166 el_srom_checksum((u_char*)buf, CONFIG_SYS_SROM_SIZE)))
167 {
168 printf ("Invalid revision info copy in nvram !\n");
169 printf ("Press key:\n <c> to copy current revision info to nvram.\n");
170 printf (" <r> to reenter revision info.\n");
171 printf ("=> ");
172 if (0 != readline (NULL))
173 {
174 switch ((char)toupper(console_buffer[0]))
175 {
176 case 'C':
177 copyNv = 1;
178 break;
179 case 'R':
180 copyNv = 1;
181 initSrom = 1;
182 break;
183 }
184 }
185 }
186
187 if (initSrom)
188 {
189 memcpy (buf, &eerev.revision[0][0], 14);
190 printf ("Enter revision number (0-9): %c ", eerev.revision[0][0]);
191 if (0 != readline (NULL))
192 {
193 eerev.revision[0][0] = (char)toupper(console_buffer[0]);
194 memcpy (&eerev.revision[1][0], buf, 12);
195 }
196
197 printf ("Enter revision character (A-Z): %c ", eerev.revision[0][1]);
198 if (1 == readline (NULL))
199 {
200 eerev.revision[0][1] = (char)toupper(console_buffer[0]);
201 }
202
203 printf ("Enter board name (V-XXXX-XXXX): %s ", (char *)&eerev.board);
204 if (11 == readline (NULL))
205 {
206 for (i=0; i<11; i++)
207 eerev.board[i] = (char)toupper(console_buffer[i]);
208 eerev.board[11] = '\0';
209 }
210
211 printf ("Enter serial number: %s ", (char *)&eerev.serial );
212 if (6 == readline (NULL))
213 {
214 for (i=0; i<6; i++)
215 eerev.serial[i] = console_buffer[i];
216 eerev.serial[6] = '\0';
217 }
218
219 printf ("Enter ether node ID with leading zero (HEX): %02x%02x%02x%02x%02x%02x ",
220 eerev.etheraddr[0], eerev.etheraddr[1],
221 eerev.etheraddr[2], eerev.etheraddr[3],
222 eerev.etheraddr[4], eerev.etheraddr[5]);
223 if (12 == readline (NULL))
224 {
225 for (i=0; i<12; i+=2)
226 eerev.etheraddr[i>>1] = (char)(16*hex[toupper(console_buffer[i])-'0'] +
227 hex[toupper(console_buffer[i+1])-'0']);
228 }
229
230 l = strlen ((char *)&eerev.text);
231 printf("Add to text section (max 64 chr): %s ", (char *)&eerev.text );
232 if (0 != readline (NULL))
233 {
234 for (i = l; i<63; i++)
235 eerev.text[i] = console_buffer[i-l];
236 eerev.text[63] = '\0';
237 }
238
239 if (strstr ((char *)&eerev.board, "75") != NULL)
240 eltec_board = 750;
241 else
242 eltec_board = 740;
243
244 if (eltec_board == 750)
245 {
246 if (CPU_TYPE == CPU_TYPE_750)
247 *(int*)&eerev.res[0] = CLK2P0TO1_1MB_PB_0P5DH;
248 else
249 *(int*)&eerev.res[0] = CLK2P5TO1_1MB_PB_0P5DH;
250
251 printf("Enter L2Cache config word with leading zero (HEX): %08X ",
252 *(int*)&eerev.res[0] );
253 if (0 != readline (NULL))
254 {
255 for (i=0; i<7; i+=2)
256 {
257 eerev.res[i>>1] =
258 (char)(16*hex[toupper(console_buffer[i])-'0'] +
259 hex[toupper(console_buffer[i+1])-'0']);
260 }
261 }
262
263
264 sromMII[20] = eerev.etheraddr[0];
265 sromMII[21] = eerev.etheraddr[1];
266 sromMII[22] = eerev.etheraddr[2];
267 sromMII[23] = eerev.etheraddr[3];
268 sromMII[24] = eerev.etheraddr[4];
269 sromMII[25] = eerev.etheraddr[5];
270 printf("\nSRom: Writing DEC21143 MII info .. ");
271
272 if (dc_srom_store ((u_short *)sromMII) == -1)
273 printf("FAILED\n");
274 else
275 printf("OK\n");
276 }
277
278 if (eltec_board == 740)
279 {
280 *(int *)&eerev.res[0] = 0;
281 sromSYM[20] = eerev.etheraddr[0];
282 sromSYM[21] = eerev.etheraddr[1];
283 sromSYM[22] = eerev.etheraddr[2];
284 sromSYM[23] = eerev.etheraddr[3];
285 sromSYM[24] = eerev.etheraddr[4];
286 sromSYM[25] = eerev.etheraddr[5];
287 printf("\nSRom: Writing DEC21143 SYM info .. ");
288
289 if (dc_srom_store ((u_short *)sromSYM) == -1)
290 printf("FAILED\n");
291 else
292 printf("OK\n");
293 }
294
295
296 eerev.crc = el_srom_checksum((u_char *)eerev.board, eerev.size);
297
298
299 printf("\nSRom: Writing revision info ...... ");
300 if (el_srom_store((BLOCK_SIZE-sizeof(revinfo)), (u_char *)&eerev,
301 sizeof(revinfo), SECOND_DEVICE, FIRST_BLOCK) == -1)
302 printf("FAILED\n\n");
303 else
304 printf("OK\n\n");
305
306
307 nvram_write (CONFIG_SYS_NV_SROM_COPY_ADDR, (void *)&eerev, CONFIG_SYS_SROM_SIZE);
308
309 }
310
311
312 if (initSrom == 0 && copyNv == 1)
313 nvram_write (CONFIG_SYS_NV_SROM_COPY_ADDR, (void *)&eerev, CONFIG_SYS_SROM_SIZE);
314
315
316 sprintf (buf, "%02x:%02x:%02x:%02x:%02x:%02x",
317 eerev.etheraddr[0], eerev.etheraddr[1],
318 eerev.etheraddr[2], eerev.etheraddr[3],
319 eerev.etheraddr[4], eerev.etheraddr[5]);
320 setenv ("ethaddr", buf);
321
322
323 printf("Ident: %s Ser %s Rev %c%c\n",
324 eerev.board, (char *)&eerev.serial,
325 eerev.revision[0][0], eerev.revision[0][1]);
326
327
328 if (strstr ((char *)&eerev.board, "75") != NULL)
329 eltec_board = 750;
330 else
331 eltec_board = 740;
332
333
334
335
336#if defined(CONFIG_SYS_L2_BAB7xx)
337 ptr = getenv("l2cache");
338 if (*ptr == '0')
339 {
340 printf ("Cache: L2 NOT activated on BAB%d\n", eltec_board);
341 }
342 else
343 {
344 printf ("Cache: L2 activated on BAB%d\n", eltec_board);
345 l2_cache_enable(*(int*)&eerev.res[0]);
346 }
347#endif
348
349
350
351
352 if ((ptr = getenv ("ata_reset_time")) != NULL)
353 {
354 ata_reset_time = (int)simple_strtoul (ptr, NULL, 10);
355 }
356 else
357 {
358 sprintf (buf, "%d", ata_reset_time);
359 setenv ("ata_reset_time", buf);
360 }
361
362
363
364
365 if ((ptr = getenv ("scsi_reset_time")) != NULL)
366 {
367 scsi_reset_time = (int)simple_strtoul (ptr, NULL, 10);
368 }
369 else
370 {
371 sprintf (buf, "%d", scsi_reset_time);
372 setenv ("scsi_reset_time", buf);
373 }
374
375
376 if ((bdf = pci_find_device(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_83C553, 0)) > 0)
377 {
378 if (pci_find_device(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C860, 0) > 0)
379 {
380
381 scsi_dev_id = PCI_DEVICE_ID_NCR_53C860;
382 scsi_max_scsi_id = 7;
383 scsi_sym53c8xx_ccf = 0x15;
384 pci_write_config_byte (bdf, WINBOND_IDEIRCR, 0xb0);
385 }
386
387 if ((ptr = getenv ("ide_dma_off")) != NULL)
388 {
389 u_long dma_off = simple_strtoul (ptr, NULL, 10);
390
391
392
393
394 bdf |= PCI_BDF(0,0,1);
395 if (dma_off & 1)
396 {
397 pci_write_config_byte (bdf, 0x46, 1);
398 printf("IDE: DMA off flag set: Bus 0 : Dev 0\n");
399 }
400 if (dma_off & 2)
401 {
402 pci_write_config_byte (bdf, 0x4a, 1);
403 printf("IDE: DMA off flag set: Bus 0 : Dev 1\n");
404 }
405 if (dma_off & 4)
406 {
407 pci_write_config_byte (bdf, 0x4e, 1);
408 printf("IDE: DMA off flag set: Bus 1 : Dev 0\n");
409 }
410 if (dma_off & 8)
411 {
412 pci_write_config_byte (bdf, 0x52, 1);
413 printf("IDE: DMA off flag set: Bus 1 : Dev 1\n");
414 }
415 }
416 }
417 return (0);
418}
419
420
421
422
423
424#ifdef CONFIG_TULIP_SELECT_MEDIA
425
426
427
428#define BMR_SWR 0x00000001
429#define STS_TS 0x00700000
430#define STS_RS 0x000e0000
431#define OMR_ST 0x00002000
432#define OMR_SR 0x00000002
433#define OMR_PS 0x00040000
434#define OMR_SDP 0x02000000
435#define OMR_PM 0x00000080
436#define OMR_PR 0x00000040
437#define OMR_PCS 0x00800000
438#define OMR_TTM 0x00400000
439
440
441
442#define DE4X5_BMR 0x000
443#define DE4X5_TPD 0x008
444#define DE4X5_RRBA 0x018
445#define DE4X5_TRBA 0x020
446#define DE4X5_STS 0x028
447#define DE4X5_OMR 0x030
448#define DE4X5_SISR 0x060
449#define DE4X5_SICR 0x068
450#define DE4X5_TXRX 0x070
451#define DE4X5_GPPR 0x078
452#define DE4X5_APROM 0x048
453
454
455
456static int INL(struct eth_device* dev, u_long addr)
457{
458 return le32_to_cpu(*(volatile u_long *)(addr + dev->iobase));
459}
460
461
462
463static void OUTL(struct eth_device* dev, int command, u_long addr)
464{
465 *(volatile u_long *)(addr + dev->iobase) = cpu_to_le32(command);
466}
467
468
469
470static void media_reg_init (
471 struct eth_device* dev,
472 u32 csr14,
473 u32 csr15_dir,
474 u32 csr15_v0,
475 u32 csr15_v1,
476 u32 csr6 )
477{
478 OUTL(dev, 0, DE4X5_OMR);
479 udelay(10 * 1000);
480 OUTL(dev, 0, DE4X5_SICR);
481 OUTL(dev, 1, DE4X5_SICR);
482 udelay(10 * 1000);
483 OUTL(dev, csr14, DE4X5_TXRX);
484 OUTL(dev, csr15_dir, DE4X5_GPPR);
485 OUTL(dev, csr15_v0, DE4X5_GPPR);
486 udelay(10 * 1000);
487 OUTL(dev, csr15_v1, DE4X5_GPPR);
488 OUTL(dev, 0x00000301, DE4X5_SISR);
489 OUTL(dev, csr6, DE4X5_OMR);
490}
491
492
493
494void dc21x4x_select_media(struct eth_device* dev)
495{
496 int i, status, ext;
497 extern unsigned int eltec_board;
498
499 if (eltec_board == 740)
500 {
501 printf("SYM media select ");
502
503 media_reg_init (dev, 0x3ffff, 0x08af0008, 0x00a10008, 0x00a50008, 0x02400080);
504 ext = status = 0;
505 for (i=0; i<2000+ext; i++)
506 {
507 status = INL(dev, DE4X5_SISR);
508 udelay(1000);
509 if (status & 0x2000) ext = 2000;
510 if ((status & 0x7000) == 0x5000) break;
511 }
512
513
514 if ((status & 0x0100f000) == 0x0100d000)
515 {
516 media_reg_init (dev, 0x37f7f, 0x08270008, 0x00210008, 0x00250008, 0x03c40280);
517 printf("100baseTx-FD\n");
518 }
519
520 else if ((status & 0x0080f000) == 0x0080d000)
521 {
522 media_reg_init (dev, 0x17f7f, 0x08270008, 0x00210008, 0x00250008, 0x03c40080);
523 printf("100baseTx\n");
524 }
525
526 else if ((status & 0x0040f000) == 0x0040d000)
527 {
528 media_reg_init (dev, 0x07f7f, 0x08af0008, 0x00a10008, 0x00a50008, 0x02400280);
529 printf("10baseT-FD\n");
530 }
531
532 else
533 {
534 media_reg_init (dev, 0x7f7f, 0x08af0008, 0x00a10008, 0x00a50008,
535 (OMR_SDP | OMR_TTM | OMR_PM));
536 printf("10baseT\n");
537 }
538 }
539 else
540 {
541 printf("MII media selected\n");
542 OUTL(dev, OMR_SDP | OMR_PS | OMR_PM, DE4X5_OMR);
543 }
544}
545#endif
546
547
548