LXR uboot/board/mpl/common/pci.c

   1/*-----------------------------------------------------------------------------+
   2|       This source code is dual-licensed.  You may use it under the terms of
   3|       the GNU General Public License version 2, or under the license below.
   4|
   5|       This source code has been made available to you by IBM on an AS-IS
   6|       basis.  Anyone receiving this source is licensed under IBM
   7|       copyrights to use it in any way he or she deems fit, including
   8|       copying it, modifying it, compiling it, and redistributing it either
   9|       with or without modifications.  No license under IBM patents or
  10|       patent applications is to be implied by the copyright license.
  11|
  12|       Any user of this software should understand that IBM cannot provide
  13|       technical support for this software and will not be responsible for
  14|       any consequences resulting from the use of this software.
  15|
  16|       Any person who transfers this source code or any derivative work
  17|       must include the IBM copyright notice, this paragraph, and the
  18|       preceding two paragraphs in the transferred software.
  19|
  20|       COPYRIGHT   I B M   CORPORATION 1995
  21|       LICENSED MATERIAL  -  PROGRAM PROPERTY OF I B M
  22+-----------------------------------------------------------------------------*/
  23/*
  24 * Adapted for PIP405 03.07.01
  25 * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
  26 *
  27 * TODO: Clean-up
  28 */
  29
  30#include <common.h>
  31#include <pci.h>
  32#include "isa.h"
  33
  34#ifdef CONFIG_405GP
  35#ifdef CONFIG_PCI
  36
  37DECLARE_GLOBAL_DATA_PTR;
  38
  39#include "piix4_pci.h"
  40#include "pci_parts.h"
  41
  42void pci_pip405_write_regs(struct pci_controller *hose, pci_dev_t dev,
  43                           struct pci_config_table *entry)
  44{
  45        struct pci_pip405_config_entry *table;
  46        int i;
  47
  48        table = (struct pci_pip405_config_entry*) entry->priv[0];
  49
  50        for (i=0; table[i].width; i++)
  51        {
  52#ifdef DEBUG
  53                printf("Reg 0x%02X Value 0x%08lX Width %02d written\n",
  54                       table[i].index, table[i].val, table[i].width);
  55#endif
  56
  57                switch(table[i].width)
  58                {
  59                case 1: pci_hose_write_config_byte(hose, dev, table[i].index, table[i].val); break;
  60                case 2: pci_hose_write_config_word(hose, dev, table[i].index, table[i].val); break;
  61                case 4: pci_hose_write_config_dword(hose, dev, table[i].index, table[i].val); break;
  62                }
  63        }
  64}
  65
  66
  67static void pci_pip405_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
  68{
  69        unsigned char int_line = 0xff;
  70        unsigned char pin;
  71        /*
  72         * Write pci interrupt line register
  73         */
  74        if(PCI_DEV(dev)==0) /* Device0 = PPC405 -> skip */
  75                return;
  76        pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &pin);
  77        if ((pin == 0) || (pin > 4))
  78            return;
  79
  80        int_line = ((PCI_DEV(dev) + (pin-1) + 10) % 4) + 28;
  81        pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, int_line);
  82#ifdef DEBUG
  83        printf("Fixup IRQ: dev %d (%x) int line %d 0x%x\n",
  84               PCI_DEV(dev),dev,int_line,int_line);
  85#endif
  86}
  87
  88extern void pci_405gp_init(struct pci_controller *hose);
  89
  90
  91static struct pci_controller hose = {
  92  config_table: pci_pip405_config_table,
  93  fixup_irq: pci_pip405_fixup_irq,
  94};
  95
  96
  97void pci_init_board(void)
  98{
  99        /*we want the ptrs to RAM not flash (ie don't use init list)*/
 100        hose.fixup_irq    = pci_pip405_fixup_irq;
 101        hose.config_table = pci_pip405_config_table;
 102#ifdef DEBUG
 103        printf("Init PCI: fixup_irq=%p config_table=%p hose=%p\n",pci_pip405_fixup_irq,pci_pip405_config_table,hose);
 104#endif
 105        pci_405gp_init(&hose);
 106}
 107
 108#endif /* CONFIG_PCI */
 109#endif /* CONFIG_405GP */
 110