LXR uboot/board/ti/omap1610inn/omap1610innovator.c

   1/*
   2 * (C) Copyright 2002
   3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4 * Marius Groeger <mgroeger@sysgo.de>
   5 *
   6 * (C) Copyright 2002
   7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
   8 *
   9 * (C) Copyright 2003
  10 * Texas Instruments, <www.ti.com>
  11 * Kshitij Gupta <Kshitij@ti.com>
  12 *
  13 * Modified for OMAP 1610 H2 board by Nishant Kamat, Jan 2004
  14 *
  15 * See file CREDITS for list of people who contributed to this
  16 * project.
  17 *
  18 * This program is free software; you can redistribute it and/or
  19 * modify it under the terms of the GNU General Public License as
  20 * published by the Free Software Foundation; either version 2 of
  21 * the License, or (at your option) any later version.
  22 *
  23 * This program is distributed in the hope that it will be useful,
  24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26 * GNU General Public License for more details.
  27 *
  28 * You should have received a copy of the GNU General Public License
  29 * along with this program; if not, write to the Free Software
  30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  31 * MA 02111-1307 USA
  32 */
  33
  34#include <common.h>
  35#include <netdev.h>
  36#if defined(CONFIG_OMAP1610)
  37#include <./configs/omap1510.h>
  38#endif
  39
  40DECLARE_GLOBAL_DATA_PTR;
  41
  42#ifdef CONFIG_CS_AUTOBOOT
  43unsigned long omap_flash_base;
  44#endif
  45
  46void flash__init (void);
  47void ether__init (void);
  48void set_muxconf_regs (void);
  49void peripheral_power_enable (void);
  50
  51#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
  52
  53static inline void delay (unsigned long loops)
  54{
  55        __asm__ volatile ("1:\n"
  56                "subs %0, %1, #1\n"
  57                "bne 1b":"=r" (loops):"0" (loops));
  58}
  59
  60/*
  61 * Miscellaneous platform dependent initialisations
  62 */
  63
  64int board_init (void)
  65{
  66        /* adress of boot parameters */
  67        gd->bd->bi_boot_params = 0x10000100;
  68
  69        /* Configure MUX settings */
  70        set_muxconf_regs ();
  71        peripheral_power_enable ();
  72
  73/* this speeds up your boot a quite a bit.  However to make it
  74 *  work, you need make sure your kernel startup flush bug is fixed.
  75 *  ... rkw ...
  76 */
  77        icache_enable ();
  78
  79        flash__init ();
  80        ether__init ();
  81        return 0;
  82}
  83
  84
  85int misc_init_r (void)
  86{
  87        /* currently empty */
  88        return (0);
  89}
  90
  91/******************************
  92 Routine:
  93 Description:
  94******************************/
  95void flash__init (void)
  96{
  97#define EMIFS_GlB_Config_REG 0xfffecc0c
  98        unsigned int regval;
  99
 100#ifdef CONFIG_CS_AUTOBOOT
 101         /* Check swapping of CS0 and CS3, set flash base accordingly */
 102        omap_flash_base = ((*((u32 *)OMAP_EMIFS_CONFIG_REG) & 0x02) == 0) ?
 103                                        PHYS_FLASH_1_BM0 : PHYS_FLASH_1_BM1;
 104#endif
 105        regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG);
 106        /* Turn off write protection for flash devices. */
 107        regval = regval | 0x0001;
 108        *((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval;
 109}
 110/*************************************************************
 111 Routine:ether__init
 112 Description: take the Ethernet controller out of reset and wait
 113                           for the EEPROM load to complete.
 114*************************************************************/
 115void ether__init (void)
 116{
 117#define ETH_CONTROL_REG 0x0400030b
 118
 119#ifdef CONFIG_H2_OMAP1610
 120        #define LAN_RESET_REGISTER 0x0400001c
 121
 122        /* The debug board on which the lan chip resides may not be powered
 123         * ON at the same time as the OMAP chip. So wait in a loop until the
 124         * lan reset register (on the debug board) is available (powered on)
 125         * and reset the lan chip.
 126         */
 127
 128        *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
 129        do {
 130                *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0001;
 131                udelay (3);
 132        } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0001);
 133
 134        do {
 135                *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
 136                udelay (3);
 137        } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0000);
 138#endif
 139
 140        *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
 141        udelay (3);
 142}
 143
 144/******************************
 145 Routine:
 146 Description:
 147******************************/
 148int dram_init (void)
 149{
 150        gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 151        gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 152
 153        return 0;
 154}
 155
 156/******************************************************
 157 Routine: set_muxconf_regs
 158 Description: Setting up the configuration Mux registers
 159                          specific to the hardware
 160*******************************************************/
 161void set_muxconf_regs (void)
 162{
 163        volatile unsigned int *MuxConfReg;
 164        /* set each registers to its reset value; */
 165        MuxConfReg =
 166                (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
 167        /* setup for UART1 */
 168        *MuxConfReg &= ~(0x02000000);   /* bit 25 */
 169        /* setup for UART2 */
 170        *MuxConfReg &= ~(0x01000000);   /* bit 24 */
 171        /* Disable Uwire CS Hi-Z */
 172        *MuxConfReg |= 0x08000000;
 173        MuxConfReg =
 174                (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_3);
 175        *MuxConfReg = 0x00000000;
 176        MuxConfReg =
 177                (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_4);
 178        *MuxConfReg = 0x00000000;
 179        MuxConfReg =
 180                (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_5);
 181        *MuxConfReg = 0x00000000;
 182        MuxConfReg =
 183                (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_6);
 184        /*setup mux for UART3 */
 185        *MuxConfReg |= 0x00000001;      /* bit3, 1, 0 (mux0 5,5,26) */
 186        *MuxConfReg &= ~0x0000003e;
 187        MuxConfReg =
 188                (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_7);
 189        *MuxConfReg = 0x00000000;
 190        MuxConfReg =
 191                (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_8);
 192        /* Disable Uwire CS Hi-Z */
 193        *MuxConfReg |= 0x00001200;      /*bit 9 for CS0 12 for CS3 */
 194        MuxConfReg =
 195                (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_9);
 196        /*  Need to turn on bits 21 and 12 in FUNC_MUX_CTRL_9 so the  */
 197        /*  hardware will actually use TX and RTS based on bit 25 in  */
 198        /*  FUNC_MUX_CTRL_0.  I told you this thing was screwy!  */
 199        *MuxConfReg |= 0x00201000;
 200        MuxConfReg =
 201                (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_A);
 202        *MuxConfReg = 0x00000000;
 203        MuxConfReg =
 204                (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_B);
 205        *MuxConfReg = 0x00000000;
 206        MuxConfReg =
 207                (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_C);
 208        /* setup for UART2 */
 209        /*  Need to turn on bits 27 and 24 in FUNC_MUX_CTRL_C so the  */
 210        /*  hardware will actually use TX and RTS based on bit 24 in  */
 211        /*  FUNC_MUX_CTRL_0. */
 212        *MuxConfReg |= 0x09000000;
 213        MuxConfReg =
 214                (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_0);
 215        *MuxConfReg = 0x00000000;
 216        MuxConfReg =
 217                (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_1);
 218        *MuxConfReg = 0x00000000;
 219        /* mux setup for SD/MMC driver */
 220        MuxConfReg =
 221                (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_2);
 222        *MuxConfReg &= 0xFFFE0FFF;
 223        MuxConfReg =
 224                (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_3);
 225        *MuxConfReg = 0x00000000;
 226        MuxConfReg =
 227                (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
 228        /* bit 13 for MMC2 XOR_CLK */
 229        *MuxConfReg &= ~(0x00002000);
 230        /* bit 29 for UART 1 */
 231        *MuxConfReg &= ~(0x00002000);
 232        MuxConfReg =
 233                (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
 234        /* Configure for USB. Turn on VBUS_CTRL and VBUS_MODE. */
 235        *MuxConfReg |= 0x000C0000;
 236        MuxConfReg =
 237                (volatile unsigned int *) ((unsigned int)USB_TRANSCEIVER_CTRL);
 238        *MuxConfReg &= ~(0x00000070);
 239        *MuxConfReg &= ~(0x00000008);
 240        *MuxConfReg |= 0x00000003;
 241        *MuxConfReg |= 0x00000180;
 242        MuxConfReg =
 243                (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
 244        /* bit 17, software controls VBUS */
 245        *MuxConfReg &= ~(0x00020000);
 246        /* Enable USB 48 and 12M clocks */
 247        *MuxConfReg |= 0x00000200;
 248        *MuxConfReg &= ~(0x00000180);
 249        /*2.75V for MMCSDIO1 */
 250        MuxConfReg =
 251                (volatile unsigned int *) ((unsigned int) VOLTAGE_CTRL_0);
 252        *MuxConfReg = 0x00001FE7;
 253        MuxConfReg =
 254                (volatile unsigned int *) ((unsigned int) PU_PD_SEL_0);
 255        *MuxConfReg = 0x00000000;
 256        MuxConfReg =
 257                (volatile unsigned int *) ((unsigned int) PU_PD_SEL_1);
 258        *MuxConfReg = 0x00000000;
 259        MuxConfReg =
 260                (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
 261        *MuxConfReg = 0x00000000;
 262        MuxConfReg =
 263                (volatile unsigned int *) ((unsigned int) PU_PD_SEL_3);
 264        *MuxConfReg = 0x00000000;
 265        MuxConfReg =
 266                (volatile unsigned int *) ((unsigned int) PU_PD_SEL_4);
 267        *MuxConfReg = 0x00000000;
 268        MuxConfReg =
 269                (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_4);
 270        *MuxConfReg = 0x00000000;
 271        /* Turn on UART2 48 MHZ clock */
 272        MuxConfReg =
 273                (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
 274        *MuxConfReg |= 0x40000000;
 275        MuxConfReg =
 276                (volatile unsigned int *) ((unsigned int) USB_OTG_CTRL);
 277        /* setup for USB VBus detection OMAP161x */
 278        *MuxConfReg |= 0x00040000;      /* bit 18 */
 279        MuxConfReg =
 280                (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
 281        /* PullUps for SD/MMC driver */
 282        *MuxConfReg |= ~(0xFFFE0FFF);
 283        MuxConfReg =
 284                (volatile unsigned int *) ((unsigned int)COMP_MODE_CTRL_0);
 285        *MuxConfReg = COMP_MODE_ENABLE;
 286}
 287
 288/******************************************************
 289 Routine: peripheral_power_enable
 290 Description: Enable the power for UART1
 291*******************************************************/
 292void peripheral_power_enable (void)
 293{
 294#define UART1_48MHZ_ENABLE      ((unsigned short)0x0200)
 295#define SW_CLOCK_REQUEST        ((volatile unsigned short *)0xFFFE0834)
 296
 297        *SW_CLOCK_REQUEST |= UART1_48MHZ_ENABLE;
 298}
 299
 300#ifdef CONFIG_CMD_NET
 301int board_eth_init(bd_t *bis)
 302{
 303        int rc = 0;
 304#ifdef CONFIG_LAN91C96
 305        rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
 306#endif
 307        return rc;
 308}
 309#endif
 310