uboot/drivers/mtd/nand/nomadik.c
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   1/*
   2 * (C) Copyright 2007 STMicroelectronics, <www.st.com>
   3 * (C) Copyright 2009 Alessandro Rubini <rubini@unipv.it>
   4 *
   5 * See file CREDITS for list of people who contributed to this
   6 * project.
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License as
  10 * published by the Free Software Foundation; either version 2 of
  11 * the License, or (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, write to the Free Software
  20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21 * MA 02111-1307 USA
  22 */
  23
  24#include <common.h>
  25#include <nand.h>
  26#include <asm/io.h>
  27
  28static inline int parity(int b) /* b is really a byte; returns 0 or ~0 */
  29{
  30        __asm__ __volatile__(
  31                "eor   %0, %0, %0, lsr #4\n\t"
  32                "eor   %0, %0, %0, lsr #2\n\t"
  33                "eor   %0, %0, %0, lsr #1\n\t"
  34                "ands  %0, %0, #1\n\t"
  35                "subne %0, %0, #2\t"
  36                : "=r" (b) : "0" (b));
  37        return b;
  38}
  39
  40/*
  41 * This is the ECC routine used in hardware, according to the manual.
  42 * HW claims to make the calculation but not the correction; so we must
  43 * recalculate the bytes for a comparison.
  44 */
  45static int ecc512(const unsigned char *data, unsigned char *ecc)
  46{
  47        int gpar = 0;
  48        int i, val, par;
  49        int pbits = 0;          /* P8, P16, ... P2048 */
  50        int pprime = 0;         /* P8', P16', ... P2048' */
  51        int lowbits;            /* P1, P2, P4 and primes */
  52
  53        for (i = 0; i < 512; i++) {
  54                par = parity((val = data[i]));
  55                gpar ^= val;
  56                pbits ^= (i & par);
  57        }
  58        /*
  59         * Ok, now gpar is global parity (xor of all bytes)
  60         * pbits are all the parity bits (non-prime ones)
  61         */
  62        par = parity(gpar);
  63        pprime = pbits ^ par;
  64        /* Put low bits in the right position for ecc[2] (bits 7..2) */
  65        lowbits = 0
  66                | (parity(gpar & 0xf0) & 0x80)  /* P4  */
  67                | (parity(gpar & 0x0f) & 0x40)  /* P4' */
  68                | (parity(gpar & 0xcc) & 0x20)  /* P2  */
  69                | (parity(gpar & 0x33) & 0x10)  /* P2' */
  70                | (parity(gpar & 0xaa) & 0x08)  /* P1  */
  71                | (parity(gpar & 0x55) & 0x04); /* P1' */
  72
  73        ecc[2] = ~(lowbits | ((pbits & 0x100) >> 7) | ((pprime & 0x100) >> 8));
  74        /* now intermix bits for ecc[1] (P1024..P128') and ecc[0] (P64..P8') */
  75        ecc[1] = ~(    (pbits & 0x80) >> 0  | ((pprime & 0x80) >> 1)
  76                    | ((pbits & 0x40) >> 1) | ((pprime & 0x40) >> 2)
  77                    | ((pbits & 0x20) >> 2) | ((pprime & 0x20) >> 3)
  78                    | ((pbits & 0x10) >> 3) | ((pprime & 0x10) >> 4));
  79
  80        ecc[0] = ~(    (pbits & 0x8) << 4  | ((pprime & 0x8) << 3)
  81                    | ((pbits & 0x4) << 3) | ((pprime & 0x4) << 2)
  82                    | ((pbits & 0x2) << 2) | ((pprime & 0x2) << 1)
  83                    | ((pbits & 0x1) << 1) | ((pprime & 0x1) << 0));
  84        return 0;
  85}
  86
  87/* This is the method in the chip->ecc field */
  88static int nomadik_ecc_calculate(struct mtd_info *mtd, const uint8_t *dat,
  89                                 uint8_t *ecc_code)
  90{
  91        return ecc512(dat, ecc_code);
  92}
  93
  94static int nomadik_ecc_correct(struct mtd_info *mtd, uint8_t *dat,
  95                                uint8_t *r_ecc, uint8_t *c_ecc)
  96{
  97        struct nand_chip *chip = mtd->priv;
  98        uint32_t r, c, d, diff; /*read, calculated, xor of them */
  99
 100        if (!memcmp(r_ecc, c_ecc, chip->ecc.bytes))
 101                return 0;
 102
 103        /* Reorder the bytes into ascending-order 24 bits -- see manual */
 104        r = r_ecc[2] << 22 | r_ecc[1] << 14 | r_ecc[0] << 6 | r_ecc[2] >> 2;
 105        c = c_ecc[2] << 22 | c_ecc[1] << 14 | c_ecc[0] << 6 | c_ecc[2] >> 2;
 106        diff = (r ^ c) & ((1<<24)-1); /* use 24 bits only */
 107
 108        /* If 12 bits are different, one per pair, it's correctable */
 109        if (((diff | (diff>>1)) & 0x555555) == 0x555555) {
 110                int bit = ((diff & 2) >> 1)
 111                        | ((diff & 0x8) >> 2) | ((diff & 0x20) >> 3);
 112                int byte;
 113
 114                d = diff >> 6; /* remove bit-order info */
 115                byte =  ((d & 2) >> 1)
 116                        | ((d & 0x8) >> 2) | ((d & 0x20) >> 3)
 117                        | ((d & 0x80) >> 4) | ((d & 0x200) >> 5)
 118                        | ((d & 0x800) >> 6) | ((d & 0x2000) >> 7)
 119                        | ((d & 0x8000) >> 8) | ((d & 0x20000) >> 9);
 120                /* correct the single bit */
 121                dat[byte] ^= 1<<bit;
 122                return 0;
 123        }
 124        /* If 1 bit only differs, it's one bit error in ECC, ignore */
 125        if ((diff ^ (1 << (ffs(diff) - 1))) == 0)
 126                return 0;
 127        /* Otherwise, uncorrectable */
 128        return -1;
 129}
 130
 131static void nomadik_ecc_hwctl(struct mtd_info *mtd, int mode)
 132{ /* mandatory in the structure but not used here */ }
 133
 134
 135/* This is the layout used by older installations, we keep compatible */
 136struct nand_ecclayout nomadik_ecc_layout = {
 137        .eccbytes = 3 * 4,
 138        .eccpos = { /* each subpage has 16 bytes: pos 2,3,4 hosts ECC */
 139                0x02, 0x03, 0x04,
 140                0x12, 0x13, 0x14,
 141                0x22, 0x23, 0x24,
 142                0x32, 0x33, 0x34},
 143        .oobfree = { {0x08, 0x08}, {0x18, 0x08}, {0x28, 0x08}, {0x38, 0x08} },
 144};
 145
 146#define MASK_ALE        (1 << 24)       /* our ALE is AD21 */
 147#define MASK_CLE        (1 << 23)       /* our CLE is AD22 */
 148
 149/* This is copied from the AT91SAM9 devices (Stelian Pop, Lead Tech Design) */
 150static void nomadik_nand_hwcontrol(struct mtd_info *mtd,
 151                                   int cmd, unsigned int ctrl)
 152{
 153        struct nand_chip *this = mtd->priv;
 154        u32 pcr0 = readl(REG_FSMC_PCR0);
 155
 156        if (ctrl & NAND_CTRL_CHANGE) {
 157                ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
 158                IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
 159
 160                if (ctrl & NAND_CLE)
 161                        IO_ADDR_W |= MASK_CLE;
 162                if (ctrl & NAND_ALE)
 163                        IO_ADDR_W |= MASK_ALE;
 164
 165                if (ctrl & NAND_NCE)
 166                        writel(pcr0 | 0x4, REG_FSMC_PCR0);
 167                else
 168                        writel(pcr0 & ~0x4, REG_FSMC_PCR0);
 169
 170                this->IO_ADDR_W = (void *) IO_ADDR_W;
 171                this->IO_ADDR_R = (void *) IO_ADDR_W;
 172        }
 173
 174        if (cmd != NAND_CMD_NONE)
 175                writeb(cmd, this->IO_ADDR_W);
 176}
 177
 178/* Returns 1 when ready; upper layers timeout at 20ms with timer routines */
 179static int nomadik_nand_ready(struct mtd_info *mtd)
 180{
 181        return 1; /* The ready bit is handled in hardware */
 182}
 183
 184/* Copy a buffer 32bits at a time: faster than defualt method which is 8bit */
 185static void nomadik_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
 186{
 187        int i;
 188        struct nand_chip *chip = mtd->priv;
 189        u32 *p = (u32 *) buf;
 190
 191        len >>= 2;
 192        writel(0, REG_FSMC_ECCR0);
 193        for (i = 0; i < len; i++)
 194                p[i] = readl(chip->IO_ADDR_R);
 195}
 196
 197int board_nand_init(struct nand_chip *chip)
 198{
 199        /* Set up the FSMC_PCR0 for nand access*/
 200        writel(0x0000004a, REG_FSMC_PCR0);
 201        /* Set up FSMC_PMEM0, FSMC_PATT0 with timing data for access */
 202        writel(0x00020401, REG_FSMC_PMEM0);
 203        writel(0x00020404, REG_FSMC_PATT0);
 204
 205        chip->options = NAND_COPYBACK | NAND_CACHEPRG | NAND_NO_PADDING;
 206        chip->cmd_ctrl = nomadik_nand_hwcontrol;
 207        chip->dev_ready = nomadik_nand_ready;
 208        /* The chip allows 32bit reads, so avoid the default 8bit copy */
 209        chip->read_buf = nomadik_nand_read_buf;
 210
 211        /* ECC: follow the hardware-defined rulse, but do it in sw */
 212        chip->ecc.mode = NAND_ECC_HW;
 213        chip->ecc.bytes = 3;
 214        chip->ecc.size = 512;
 215        chip->ecc.layout = &nomadik_ecc_layout;
 216        chip->ecc.calculate = nomadik_ecc_calculate;
 217        chip->ecc.hwctl = nomadik_ecc_hwctl;
 218        chip->ecc.correct = nomadik_ecc_correct;
 219
 220        return 0;
 221}
 222