LXR uboot/drivers/usb/host/ehci-kirkwood.c

   1/*
   2 * (C) Copyright 2009
   3 * Marvell Semiconductor <www.marvell.com>
   4 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
   5 *
   6 * See file CREDITS for list of people who contributed to this
   7 * project.
   8 *
   9 * This program is free software; you can redistribute it and/or
  10 * modify it under the terms of the GNU General Public License as
  11 * published by the Free Software Foundation; either version 2 of
  12 * the License, or (at your option) any later version.
  13 *
  14 * This program is distributed in the hope that it will be useful,
  15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17 * GNU General Public License for more details.
  18 *
  19 * You should have received a copy of the GNU General Public License
  20 * along with this program; if not, write to the Free Software
  21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  22 * MA 02110-1301 USA
  23 */
  24
  25#include <common.h>
  26#include <asm/io.h>
  27#include <usb.h>
  28#include "ehci.h"
  29#include "ehci-core.h"
  30#include <asm/arch/kirkwood.h>
  31
  32#define rdl(off)        readl(KW_USB20_BASE + (off))
  33#define wrl(off, val)   writel((val), KW_USB20_BASE + (off))
  34
  35#define USB_WINDOW_CTRL(i)      (0x320 + ((i) << 4))
  36#define USB_WINDOW_BASE(i)      (0x324 + ((i) << 4))
  37#define USB_TARGET_DRAM         0x0
  38
  39/*
  40 * USB 2.0 Bridge Address Decoding registers setup
  41 */
  42static void usb_brg_adrdec_setup(void)
  43{
  44        int i;
  45        u32 size, attrib;
  46
  47        for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  48
  49                /* Enable DRAM bank */
  50                switch (i) {
  51                case 0:
  52                        attrib = KWCPU_ATTR_DRAM_CS0;
  53                        break;
  54                case 1:
  55                        attrib = KWCPU_ATTR_DRAM_CS1;
  56                        break;
  57                case 2:
  58                        attrib = KWCPU_ATTR_DRAM_CS2;
  59                        break;
  60                case 3:
  61                        attrib = KWCPU_ATTR_DRAM_CS3;
  62                        break;
  63                default:
  64                        /* invalide bank, disable access */
  65                        attrib = 0;
  66                        break;
  67                }
  68
  69                size = kw_sdram_bs(i);
  70                if ((size) && (attrib))
  71                        wrl(USB_WINDOW_CTRL(i),
  72                                KWCPU_WIN_CTRL_DATA(size, USB_TARGET_DRAM,
  73                                        attrib, KWCPU_WIN_ENABLE));
  74                else
  75                        wrl(USB_WINDOW_CTRL(i), KWCPU_WIN_DISABLE);
  76
  77                wrl(USB_WINDOW_BASE(i), kw_sdram_bar(i));
  78        }
  79}
  80
  81/*
  82 * Create the appropriate control structures to manage
  83 * a new EHCI host controller.
  84 */
  85int ehci_hcd_init(void)
  86{
  87        usb_brg_adrdec_setup();
  88
  89        hccr = (struct ehci_hccr *)(KW_USB20_BASE + 0x100);
  90        hcor = (struct ehci_hcor *)((uint32_t) hccr
  91                        + HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
  92
  93        debug("Kirkwood-ehci: init hccr %x and hcor %x hc_length %d\n",
  94                (uint32_t)hccr, (uint32_t)hcor,
  95                (uint32_t)HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
  96
  97        return 0;
  98}
  99
 100/*
 101 * Destroy the appropriate control structures corresponding
 102 * the the EHCI host controller.
 103 */
 104int ehci_hcd_stop(void)
 105{
 106        return 0;
 107}
 108