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28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31
32
33
34
35
36#define CONFIG_405GP 1
37#define CONFIG_4xx 1
38#define CONFIG_CPCI405 1
39
40#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
41
42#define CONFIG_BOARD_EARLY_INIT_F 1
43#define CONFIG_MISC_INIT_R 1
44
45#define CONFIG_SYS_CLK_FREQ 33000000
46
47#define CONFIG_BAUDRATE 9600
48#define CONFIG_BOOTDELAY 3
49
50#undef CONFIG_BOOTARGS
51#undef CONFIG_BOOTCOMMAND
52
53#define CONFIG_PREBOOT
54
55#define CONFIG_LOADS_ECHO 1
56#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
57
58#define CONFIG_PPC4xx_EMAC
59#define CONFIG_MII 1
60#define CONFIG_PHY_ADDR 0
61#define CONFIG_LXT971_NO_SLEEP 1
62#define CONFIG_RESET_PHY_R 1
63
64#define CONFIG_NET_MULTI 1
65#undef CONFIG_HAS_ETH1
66
67
68
69
70#define CONFIG_BOOTP_SUBNETMASK
71#define CONFIG_BOOTP_GATEWAY
72#define CONFIG_BOOTP_HOSTNAME
73#define CONFIG_BOOTP_BOOTPATH
74#define CONFIG_BOOTP_DNS
75#define CONFIG_BOOTP_DNS2
76#define CONFIG_BOOTP_SEND_HOSTNAME
77
78
79
80
81
82#include <config_cmd_default.h>
83
84#define CONFIG_CMD_DHCP
85#define CONFIG_CMD_PCI
86#define CONFIG_CMD_IRQ
87#define CONFIG_CMD_IDE
88#define CONFIG_CMD_FAT
89#define CONFIG_CMD_ELF
90#define CONFIG_CMD_MII
91#define CONFIG_CMD_EEPROM
92
93
94#define CONFIG_MAC_PARTITION
95#define CONFIG_DOS_PARTITION
96
97#define CONFIG_SUPPORT_VFAT
98
99#undef CONFIG_WATCHDOG
100
101#define CONFIG_SDRAM_BANK0 1
102
103
104
105
106#define CONFIG_SYS_LONGHELP
107#define CONFIG_SYS_PROMPT "=> "
108
109#undef CONFIG_SYS_HUSH_PARSER
110#ifdef CONFIG_SYS_HUSH_PARSER
111#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
112#endif
113
114#if defined(CONFIG_CMD_KGDB)
115#define CONFIG_SYS_CBSIZE 1024
116#else
117#define CONFIG_SYS_CBSIZE 256
118#endif
119#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
120#define CONFIG_SYS_MAXARGS 16
121#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
122
123#define CONFIG_SYS_DEVICE_NULLDEV 1
124
125#define CONFIG_SYS_CONSOLE_INFO_QUIET 1
126
127#define CONFIG_SYS_MEMTEST_START 0x0400000
128#define CONFIG_SYS_MEMTEST_END 0x0C00000
129
130#define CONFIG_CONS_INDEX 1
131#define CONFIG_SYS_NS16550
132#define CONFIG_SYS_NS16550_SERIAL
133#define CONFIG_SYS_NS16550_REG_SIZE 1
134#define CONFIG_SYS_NS16550_CLK get_serial_clock()
135
136#undef CONFIG_SYS_EXT_SERIAL_CLOCK
137#define CONFIG_SYS_BASE_BAUD 691200
138
139
140#define CONFIG_SYS_BAUDRATE_TABLE \
141 { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \
142 57600, 115200, 230400, 460800, 921600 }
143
144#define CONFIG_SYS_LOAD_ADDR 0x100000
145#define CONFIG_SYS_EXTBDINFO 1
146
147#define CONFIG_SYS_HZ 1000
148
149#define CONFIG_LOOPW 1
150
151#define CONFIG_ZERO_BOOTDELAY_CHECK
152
153
154
155
156
157#define PCI_HOST_ADAPTER 0
158#define PCI_HOST_FORCE 1
159#define PCI_HOST_AUTO 2
160
161#define CONFIG_PCI
162#define CONFIG_PCI_HOST PCI_HOST_AUTO
163#define CONFIG_PCI_PNP
164
165
166#define CONFIG_PCI_SCAN_SHOW
167
168#define CONFIG_PCI_CONFIG_HOST_BRIDGE 1
169
170#define CONFIG_PCI_BOOTDELAY 0
171
172#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x12FE
173#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0405
174#define CONFIG_SYS_PCI_SUBSYS_DEVICEID2 0x0406
175#define CONFIG_SYS_PCI_CLASSCODE 0x0b20
176#define CONFIG_SYS_PCI_PTM1LA (bd->bi_memstart)
177#define CONFIG_SYS_PCI_PTM1MS (~(bd->bi_memsize - 1) | 1)
178#define CONFIG_SYS_PCI_PTM1PCI 0x00000000
179#define CONFIG_SYS_PCI_PTM2LA 0xffc00000
180#define CONFIG_SYS_PCI_PTM2MS 0xffc00001
181#define CONFIG_SYS_PCI_PTM2PCI 0x04000000
182
183#define CONFIG_PCI_4xx_PTM_OVERWRITE 1
184
185
186
187
188
189#undef CONFIG_IDE_8xx_DIRECT
190#undef CONFIG_IDE_LED
191#undef CONFIG_IDE_RESET
192
193#define CONFIG_SYS_IDE_MAXBUS 1
194#define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*1)
195
196#define CONFIG_SYS_ATA_BASE_ADDR 0xF0100000
197#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
198
199#define CONFIG_SYS_ATA_DATA_OFFSET 0x0000
200#define CONFIG_SYS_ATA_REG_OFFSET 0x0000
201#define CONFIG_SYS_ATA_ALT_OFFSET 0x0000
202
203
204
205
206
207
208#define CONFIG_SYS_SDRAM_BASE 0x00000000
209#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_TEXT_BASE
210#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
211#define CONFIG_SYS_MONITOR_LEN (~(CONFIG_SYS_TEXT_BASE) + 1)
212#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
213
214
215
216
217
218
219#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
220
221
222
223#define CONFIG_SYS_MAX_FLASH_BANKS 2
224#define CONFIG_SYS_MAX_FLASH_SECT 256
225
226#define CONFIG_SYS_FLASH_ERASE_TOUT 120000
227#define CONFIG_SYS_FLASH_WRITE_TOUT 500
228
229#define CONFIG_SYS_FLASH_WORD_SIZE unsigned short
230#define CONFIG_SYS_FLASH_ADDR0 0x5555
231#define CONFIG_SYS_FLASH_ADDR1 0x2AAA
232
233
234
235
236#define CONFIG_SYS_FLASH_READ0 0x0000
237#define CONFIG_SYS_FLASH_READ1 0x0001
238#define CONFIG_SYS_FLASH_READ2 0x0002
239
240#define CONFIG_SYS_FLASH_EMPTY_INFO
241
242#define CONFIG_SYS_NVRAM_BASE_ADDR 0xf0200000
243#define CONFIG_SYS_NVRAM_SIZE (32*1024)
244#define CONFIG_SYS_VXWORKS_MAC_PTR (CONFIG_SYS_NVRAM_BASE_ADDR+0x6900)
245
246#if 1
247
248
249
250#define CONFIG_ENV_IS_IN_NVRAM 1
251#define CONFIG_ENV_SIZE 0x1000
252#define CONFIG_ENV_ADDR \
253 (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE)
254
255#else
256
257#define CONFIG_ENV_IS_IN_EEPROM 1
258#define CONFIG_ENV_OFFSET 0x000
259#define CONFIG_ENV_SIZE 0x400
260
261#endif
262
263
264
265
266#define CONFIG_HARD_I2C
267#define CONFIG_PPC4XX_I2C
268#define CONFIG_SYS_I2C_SPEED 400000
269#define CONFIG_SYS_I2C_SLAVE 0x7F
270
271#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
272#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
273
274#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
275#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
276
277
278#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
279
280
281
282
283
284
285
286#define FLASH_BASE0_PRELIM 0xFF800000
287#define FLASH_BASE1_PRELIM 0xFFC00000
288
289
290
291
292
293
294#define CONFIG_SYS_EBC_PB0AP 0x92015480
295#define CONFIG_SYS_EBC_PB0CR 0xFFC5A000
296
297
298#define CONFIG_SYS_EBC_PB1AP 0x92015480
299#define CONFIG_SYS_EBC_PB1CR 0xFF85A000
300
301
302#define CONFIG_SYS_EBC_PB2AP 0x010053C0
303#define CONFIG_SYS_EBC_PB2CR 0xF0018000
304
305
306#define CONFIG_SYS_EBC_PB3AP 0x010053C0
307#define CONFIG_SYS_EBC_PB3CR 0xF011A000
308
309
310#define CONFIG_SYS_EBC_PB4AP 0x01005280
311#define CONFIG_SYS_EBC_PB4CR 0xF0218000
312
313
314#define CONFIG_SYS_EBC_PB5AP 0x04005B80
315#define CONFIG_SYS_EBC_PB5CR 0xF0318000
316
317
318
319
320
321
322#define CONFIG_SYS_FPGA_PRG 0x04000000
323#define CONFIG_SYS_FPGA_CLK 0x02000000
324#define CONFIG_SYS_FPGA_DATA 0x01000000
325#define CONFIG_SYS_FPGA_INIT 0x00400000
326#define CONFIG_SYS_FPGA_DONE 0x00800000
327
328
329
330
331#if 1
332#define CONFIG_SYS_INIT_DCACHE_CS 7
333
334#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
335#else
336#define CONFIG_SYS_INIT_RAM_ADDR 0x00df0000
337#endif
338#define CONFIG_SYS_INIT_RAM_SIZE 0x2000
339#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
340#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
341
342#endif
343