1/* 2 * (C) Copyright 2004 Sandburst Corporation 3 * 4 * See file CREDITS for list of people who contributed to this 5 * project. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of 10 * the License, or (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * MA 02111-1307 USA 21 */ 22 23/************************************************************************ 24 * KAMINOREFDES.h - configuration for the Sandburst Kamino Reference 25 * design. 26 ***********************************************************************/ 27 28/* 29 * $Id: KAREF.h,v 1.6 2005/06/03 15:05:25 tsawyer Exp $ 30 * 31 */ 32 33#ifndef __CONFIG_H 34#define __CONFIG_H 35 36/*----------------------------------------------------------------------- 37 * High Level Configuration Options 38 *----------------------------------------------------------------------*/ 39#define CONFIG_KAREF 1 /* Board is Kamino Ref Variant */ 40#define CONFIG_440GX 1 /* Specifc GX support */ 41#define CONFIG_440 1 /* ... PPC440 family */ 42#define CONFIG_4xx 1 /* ... PPC4xx family */ 43#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ 44#define CONFIG_MISC_INIT_F 1 /* Call board misc_init_f */ 45#define CONFIG_MISC_INIT_R 1 /* Call board misc_init_r */ 46 47#define CONFIG_SYS_TEXT_BASE 0xFFF80000 48 49#undef CONFIG_SYS_DRAM_TEST /* Disable-takes long time!*/ 50#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */ 51 52#define CONFIG_VERY_BIG_RAM 1 53#define CONFIG_VERSION_VARIABLE 54 55#define CONFIG_IDENT_STRING " Sandburst Kamino Reference Design" 56 57/*----------------------------------------------------------------------- 58 * Base addresses -- Note these are effective addresses where the 59 * actual resources get mapped (not physical addresses) 60 *----------------------------------------------------------------------*/ 61#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ 62#define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */ 63#define CONFIG_SYS_MONITOR_BASE 0xfff80000 /* start of monitor */ 64#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */ 65#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */ 66#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */ 67 68#define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000) 69#define CONFIG_SYS_KAREF_FPGA_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x08200000) 70#define CONFIG_SYS_OFEM_FPGA_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x08400000) 71#define CONFIG_SYS_BME32_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x08500000) 72#define CONFIG_SYS_GPIO_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700) 73 74/* Here for completeness */ 75#define CONFIG_SYS_OFEMAC_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x08600000) 76 77/*----------------------------------------------------------------------- 78 * Initial RAM & stack pointer (placed in internal SRAM) 79 *----------------------------------------------------------------------*/ 80#define CONFIG_SYS_TEMP_STACK_OCM 1 81#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE 82#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */ 83#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */ 84 85#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 86#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) 87 88#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Rsrv 256kB for Mon */ 89#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Rsrv 128kB for malloc */ 90 91/*----------------------------------------------------------------------- 92 * Serial Port 93 *----------------------------------------------------------------------*/ 94#define CONFIG_CONS_INDEX 1 /* Use UART0 */ 95#define CONFIG_SYS_NS16550 96#define CONFIG_SYS_NS16550_SERIAL 97#define CONFIG_SYS_NS16550_REG_SIZE 1 98#define CONFIG_SYS_NS16550_CLK get_serial_clock() 99#define CONFIG_SERIAL_MULTI 1 100#define CONFIG_BAUDRATE 9600 101 102#define CONFIG_SYS_BAUDRATE_TABLE \ 103 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} 104 105/*----------------------------------------------------------------------- 106 * NVRAM/RTC 107 * 108 * NOTE: Upper 8 bytes of NVRAM is where the RTC registers are located. 109 * The DS1743 code assumes this condition (i.e. -- it assumes the base 110 * address for the RTC registers is: 111 * 112 * CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE 113 * 114 *----------------------------------------------------------------------*/ 115#define CONFIG_SYS_NVRAM_SIZE (0x2000 - 8) /* NVRAM size(8k)- RTC regs*/ 116#define CONFIG_RTC_DS174x 1 /* DS1743 RTC */ 117 118/*----------------------------------------------------------------------- 119 * FLASH related 120 *----------------------------------------------------------------------*/ 121#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ 122#define CONFIG_SYS_MAX_FLASH_SECT 8 /* sectors per device */ 123 124#undef CONFIG_SYS_FLASH_CHECKSUM 125#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Flash Erase TO (in ms) */ 126#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write TO(in ms) */ 127 128/*----------------------------------------------------------------------- 129 * DDR SDRAM 130 *----------------------------------------------------------------------*/ 131#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup*/ 132#define SPD_EEPROM_ADDRESS {0x53} /* SPD i2c spd addresses */ 133 134/*----------------------------------------------------------------------- 135 * I2C 136 *----------------------------------------------------------------------*/ 137#define CONFIG_HARD_I2C 1 /* I2C hardware support */ 138#undef CONFIG_SOFT_I2C /* I2C !bit-banged */ 139#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ 140#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed 400kHz */ 141#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */ 142#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */ 143#define CONFIG_I2C_BUS1 1 /* Include i2c bus 1 supp */ 144 145 146/*----------------------------------------------------------------------- 147 * Environment 148 *----------------------------------------------------------------------*/ 149#define CONFIG_ENV_IS_IN_NVRAM 1 /* Environment uses NVRAM */ 150#undef CONFIG_ENV_IS_IN_FLASH /* ... not in flash */ 151#undef CONFIG_ENV_IS_IN_EEPROM /* ... not in EEPROM */ 152#define CONFIG_ENV_OVERWRITE 1 /* allow env overwrite */ 153 154#define CONFIG_ENV_SIZE 0x1000 /* Size of Env vars */ 155#define CONFIG_ENV_ADDR (CONFIG_SYS_NVRAM_BASE_ADDR) 156 157#define CONFIG_BOOTDELAY 5 /* 5 second autoboot */ 158 159#define CONFIG_LOADS_ECHO 1 /* echo on for serial dnld */ 160#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ 161 162/*----------------------------------------------------------------------- 163 * Networking 164 *----------------------------------------------------------------------*/ 165#define CONFIG_PPC4xx_EMAC 166#define CONFIG_MII 1 /* MII PHY management */ 167#define CONFIG_NET_MULTI 1 168#define CONFIG_PHY_ADDR 0xff /* no phy on EMAC0 */ 169#define CONFIG_PHY1_ADDR 0xff /* no phy on EMAC1 */ 170#define CONFIG_PHY2_ADDR 0x08 /* PHY addr, MGMT, EMAC2 */ 171#define CONFIG_PHY3_ADDR 0x18 /* PHY addr, LCL, EMAC3 */ 172#define CONFIG_HAS_ETH0 173#define CONFIG_HAS_ETH1 174#define CONFIG_HAS_ETH2 175#define CONFIG_HAS_ETH3 176#define CONFIG_PHY_RESET 1 /* reset phy upon startup */ 177#define CONFIG_CIS8201_PHY 1 /* RGMII mode for Cicada */ 178#define CONFIG_CIS8201_SHORT_ETCH 1 /* Use short etch mode */ 179#define CONFIG_PHY_GIGE 1 /* GbE speed/duplex detect */ 180#define CONFIG_PHY_RESET_DELAY 1000 181#define CONFIG_NETMASK 255.255.0.0 182#define CONFIG_ETHADDR 00:00:00:00:00:00 /* No EMAC 0 support */ 183#define CONFIG_ETH1ADDR 00:00:00:00:00:00 /* No EMAC 1 support */ 184#define CONFIG_SYS_RX_ETH_BUFFER 32 /* #eth rx buff & descrs */ 185 186 187/* 188 * BOOTP options 189 */ 190#define CONFIG_BOOTP_BOOTFILESIZE 191#define CONFIG_BOOTP_BOOTPATH 192#define CONFIG_BOOTP_GATEWAY 193#define CONFIG_BOOTP_HOSTNAME 194 195 196/* 197 * Command line configuration. 198 */ 199#include <config_cmd_default.h> 200 201#define CONFIG_CMD_PCI 202#define CONFIG_CMD_IRQ 203#define CONFIG_CMD_I2C 204#define CONFIG_CMD_DHCP 205#define CONFIG_CMD_DATE 206#define CONFIG_CMD_BEDBUG 207#define CONFIG_CMD_PING 208#define CONFIG_CMD_DIAG 209#define CONFIG_CMD_MII 210#define CONFIG_CMD_NET 211#define CONFIG_CMD_ELF 212#define CONFIG_CMD_IDE 213#define CONFIG_CMD_FAT 214 215 216/* Include NetConsole support */ 217#define CONFIG_NETCONSOLE 218 219/* Include auto complete with tabs */ 220#define CONFIG_AUTO_COMPLETE 1 221#define CONFIG_SYS_ALT_MEMTEST 1 /* use real memory test */ 222 223#define CONFIG_SYS_LONGHELP /* undef to save memory */ 224#define CONFIG_SYS_PROMPT "KaRefDes=> " /* Monitor Command Prompt */ 225 226#define CONFIG_SYS_HUSH_PARSER 1 /* HUSH for ext'd cli */ 227#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 228 229 230/*----------------------------------------------------------------------- 231 * Console Buffer 232 *----------------------------------------------------------------------*/ 233#if defined(CONFIG_CMD_KGDB) 234#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 235#else 236#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 237#endif 238#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 239 /* Print Buffer Size */ 240#define CONFIG_SYS_MAXARGS 16 /* max number of cmd args */ 241#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */ 242 243/*----------------------------------------------------------------------- 244 * Memory Test 245 *----------------------------------------------------------------------*/ 246#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */ 247#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ 248 249/*----------------------------------------------------------------------- 250 * Compact Flash (in true IDE mode) 251 *----------------------------------------------------------------------*/ 252#undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */ 253#undef CONFIG_IDE_LED /* no led for ide supported */ 254 255#define CONFIG_IDE_RESET /* reset for ide supported */ 256#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE busses */ 257#define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*1) /* max. 1 drives per IDE bus */ 258 259#define CONFIG_SYS_ATA_BASE_ADDR 0xF0000000 260#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 261#define CONFIG_SYS_ATA_DATA_OFFSET 0x0000 /* Offset for data I/O */ 262#define CONFIG_SYS_ATA_REG_OFFSET 0x0000 /* Offset for normal register accesses*/ 263#define CONFIG_SYS_ATA_ALT_OFFSET 0x100000 /* Offset for alternate registers */ 264 265#define CONFIG_SYS_ATA_STRIDE 2 /* Directly connected CF, needs a stride 266 to get to the correct offset */ 267#define CONFIG_DOS_PARTITION 1 /* Include dos partition */ 268 269/*----------------------------------------------------------------------- 270 * PCI 271 *----------------------------------------------------------------------*/ 272/* General PCI */ 273#define CONFIG_PCI /* include pci support */ 274#define CONFIG_PCI_PNP /* do pci plug-and-play */ 275#define CONFIG_PCI_SCAN_SHOW /* show pci devices */ 276#define CONFIG_SYS_PCI_TARGBASE (CONFIG_SYS_PCI_MEMBASE) 277 278/* Board-specific PCI */ 279#define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target*/ 280 281#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x17BA /* Sandburst */ 282#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */ 283 284/* 285 * For booting Linux, the board info and command line data 286 * have to be in the first 8 MB of memory, since this is 287 * the maximum mapped by the Linux kernel during initialization. 288 */ 289#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ 290 291#if defined(CONFIG_CMD_KGDB) 292#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port baud */ 293#define CONFIG_KGDB_SER_INDEX 2 /* kgdb serial port */ 294#endif 295 296/*----------------------------------------------------------------------- 297 * Miscellaneous configurable options 298 *----------------------------------------------------------------------*/ 299#undef CONFIG_WATCHDOG /* watchdog disabled */ 300#define CONFIG_SYS_LOAD_ADDR 0x8000000 /* default load address */ 301#define CONFIG_SYS_EXTBDINFO 1 /* use extended board_info */ 302 303#define CONFIG_SYS_HZ 100 /* decr freq: 1 ms ticks */ 304 305 306#endif /* __CONFIG_H */ 307