1/* 2 * (C) Copyright 2010 3 * ISEE 2007 SL, <www.iseebcn.com> 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License as 7 * published by the Free Software Foundation; either version 2 of 8 * the License, or (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 18 * MA 02111-1307 USA 19 */ 20 21#ifndef __CONFIG_H 22#define __CONFIG_H 23#include <asm/sizes.h> 24 25/* 26 * High Level Configuration Options 27 */ 28#define CONFIG_OMAP 1 /* in a TI OMAP core */ 29#define CONFIG_OMAP34XX 1 /* which is a 34XX */ 30#define CONFIG_OMAP3430 1 /* which is in a 3430 */ 31#define CONFIG_OMAP3_IGEP0020 1 /* working with IGEP0020 */ 32 33#define CONFIG_SDRC /* The chip has SDRC controller */ 34 35#include <asm/arch/cpu.h> 36#include <asm/arch/omap3.h> 37 38/* 39 * Display CPU and Board information 40 */ 41#define CONFIG_DISPLAY_CPUINFO 1 42#define CONFIG_DISPLAY_BOARDINFO 1 43 44/* Clock Defines */ 45#define V_OSCK 26000000 /* Clock output from T2 */ 46#define V_SCLK (V_OSCK >> 1) 47 48#define CONFIG_MISC_INIT_R 49 50#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 51#define CONFIG_SETUP_MEMORY_TAGS 1 52#define CONFIG_INITRD_TAG 1 53#define CONFIG_REVISION_TAG 1 54 55#define CONFIG_OF_LIBFDT 1 56 57/* 58 * NS16550 Configuration 59 */ 60 61#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 62 63#define CONFIG_SYS_NS16550 64#define CONFIG_SYS_NS16550_SERIAL 65#define CONFIG_SYS_NS16550_REG_SIZE (-4) 66#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 67 68/* select serial console configuration */ 69#define CONFIG_CONS_INDEX 3 70#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 71#define CONFIG_SERIAL3 3 72 73/* allow to overwrite serial and ethaddr */ 74#define CONFIG_ENV_OVERWRITE 75#define CONFIG_BAUDRATE 115200 76#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} 77#define CONFIG_GENERIC_MMC 1 78#define CONFIG_MMC 1 79#define CONFIG_OMAP_HSMMC 1 80#define CONFIG_DOS_PARTITION 1 81 82/* DDR */ 83#define CONFIG_OMAP3_NUMONYX_DDR 1 84 85/* USB */ 86#define CONFIG_MUSB_UDC 1 87#define CONFIG_USB_OMAP3 1 88#define CONFIG_TWL4030_USB 1 89 90/* USB device configuration */ 91#define CONFIG_USB_DEVICE 1 92#define CONFIG_USB_TTY 1 93#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 94 95/* Change these to suit your needs */ 96#define CONFIG_USBD_VENDORID 0x0451 97#define CONFIG_USBD_PRODUCTID 0x5678 98#define CONFIG_USBD_MANUFACTURER "Texas Instruments" 99#define CONFIG_USBD_PRODUCT_NAME "IGEP" 100 101/* commands to include */ 102#include <config_cmd_default.h> 103 104#define CONFIG_CMD_CACHE 105#define CONFIG_CMD_EXT2 /* EXT2 Support */ 106#define CONFIG_CMD_FAT /* FAT support */ 107#define CONFIG_CMD_I2C /* I2C serial bus support */ 108#define CONFIG_CMD_MMC /* MMC support */ 109#define CONFIG_CMD_ONENAND /* ONENAND support */ 110#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ 111#define CONFIG_CMD_DHCP 112#define CONFIG_CMD_PING 113#define CONFIG_CMD_NFS /* NFS support */ 114#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ 115#define CONFIG_MTD_DEVICE 116 117#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 118#undef CONFIG_CMD_IMLS /* List all found images */ 119 120#define CONFIG_SYS_NO_FLASH 121#define CONFIG_HARD_I2C 1 122#define CONFIG_SYS_I2C_SPEED 100000 123#define CONFIG_SYS_I2C_SLAVE 1 124#define CONFIG_SYS_I2C_BUS 0 125#define CONFIG_SYS_I2C_BUS_SELECT 1 126#define CONFIG_DRIVER_OMAP34XX_I2C 1 127 128/* 129 * TWL4030 130 */ 131#define CONFIG_TWL4030_POWER 1 132 133#define CONFIG_BOOTDELAY 3 134 135#define CONFIG_EXTRA_ENV_SETTINGS \ 136 "usbtty=cdc_acm\0" \ 137 "loadaddr=0x82000000\0" \ 138 "usbtty=cdc_acm\0" \ 139 "console=ttyS2,115200n8\0" \ 140 "mpurate=500\0" \ 141 "vram=12M\0" \ 142 "dvimode=1024x768MR-16@60\0" \ 143 "defaultdisplay=dvi\0" \ 144 "mmcdev=0\0" \ 145 "mmcroot=/dev/mmcblk0p2 rw\0" \ 146 "mmcrootfstype=ext3 rootwait\0" \ 147 "nandroot=/dev/mtdblock4 rw\0" \ 148 "nandrootfstype=jffs2\0" \ 149 "mmcargs=setenv bootargs console=${console} " \ 150 "mpurate=${mpurate} " \ 151 "vram=${vram} " \ 152 "omapfb.mode=dvi:${dvimode} " \ 153 "omapfb.debug=y " \ 154 "omapdss.def_disp=${defaultdisplay} " \ 155 "root=${mmcroot} " \ 156 "rootfstype=${mmcrootfstype}\0" \ 157 "nandargs=setenv bootargs console=${console} " \ 158 "mpurate=${mpurate} " \ 159 "vram=${vram} " \ 160 "omapfb.mode=dvi:${dvimode} " \ 161 "omapfb.debug=y " \ 162 "omapdss.def_disp=${defaultdisplay} " \ 163 "root=${nandroot} " \ 164 "rootfstype=${nandrootfstype}\0" \ 165 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 166 "bootscript=echo Running bootscript from mmc ...; " \ 167 "source ${loadaddr}\0" \ 168 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 169 "mmcboot=echo Booting from mmc ...; " \ 170 "run mmcargs; " \ 171 "bootm ${loadaddr}\0" \ 172 "nandboot=echo Booting from onenand ...; " \ 173 "run nandargs; " \ 174 "onenand read ${loadaddr} 280000 400000; " \ 175 "bootm ${loadaddr}\0" \ 176 177#define CONFIG_BOOTCOMMAND \ 178 "if mmc rescan ${mmcdev}; then " \ 179 "if run loadbootscript; then " \ 180 "run bootscript; " \ 181 "else " \ 182 "if run loaduimage; then " \ 183 "run mmcboot; " \ 184 "else run nandboot; " \ 185 "fi; " \ 186 "fi; " \ 187 "else run nandboot; fi" 188 189#define CONFIG_AUTO_COMPLETE 1 190 191/* 192 * Miscellaneous configurable options 193 */ 194#define CONFIG_SYS_LONGHELP /* undef to save memory */ 195#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 196#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 197#define CONFIG_SYS_PROMPT "U-Boot # " 198#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 199/* Print Buffer Size */ 200#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 201 sizeof(CONFIG_SYS_PROMPT) + 16) 202#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 203/* Boot Argument Buffer Size */ 204#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 205 206#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ 207 /* works on */ 208#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 209 0x01F00000) /* 31MB */ 210 211#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ 212 /* load address */ 213 214#define CONFIG_SYS_MONITOR_LEN (256 << 10) 215 216/* 217 * OMAP3 has 12 GP timers, they can be driven by the system clock 218 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 219 * This rate is divided by a local divisor. 220 */ 221#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) 222#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 223#define CONFIG_SYS_HZ 1000 224 225/* 226 * Stack sizes 227 * 228 * The stack sizes are set up in start.S using the settings below 229 */ 230#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ 231 232/* 233 * Physical Memory Map 234 * 235 */ 236#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 237#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 238#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 meg */ 239#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 240 241/* SDRAM Bank Allocation method */ 242#define SDRC_R_B_C 1 243 244/* 245 * FLASH and environment organization 246 */ 247 248#define PISMO1_ONEN_SIZE GPMC_SIZE_128M /* Configure the PISMO */ 249 250#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP 251 252#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */ 253 254#define CONFIG_ENV_IS_IN_ONENAND 1 255#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */ 256#define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET 257 258/* 259 * Size of malloc() pool 260 */ 261#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 262 263/* 264 * SMSC911x Ethernet 265 */ 266#if defined(CONFIG_CMD_NET) 267#define CONFIG_NET_MULTI 268#define CONFIG_SMC911X 269#define CONFIG_SMC911X_32_BIT 270#define CONFIG_SMC911X_BASE 0x2C000000 271#endif /* (CONFIG_CMD_NET) */ 272 273#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 274#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 275#define CONFIG_SYS_INIT_RAM_SIZE 0x800 276#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 277 CONFIG_SYS_INIT_RAM_SIZE - \ 278 GENERATED_GBL_DATA_SIZE) 279 280#endif /* __CONFIG_H */ 281